Week In Review: Manufacturing, Test


Chipmakers and OEMs Apple has introduced a new MacBook Air, 13-inch MacBook Pro, and Mac mini powered by the M1, the first in a family of chips designed by Apple specifically for the Mac. Based on a 5nm process from TSMC, the M1 is packed with 16 billion transistors, the most Apple has ever put into a chip. It features a CPU core, graphics, AI and other functions all in the same chip. In total... » read more

Week In Review: Design, Low Power


M&A Synopsys acquired Moortec, a provider of in-chip monitoring technology specializing in process, voltage and temperature (PVT) sensors. Moortec's sensors will be a key component to Synopsys' new Silicon Lifecycle Management (SLM) platform. "This acquisition accelerates the expansion of our SLM platform by providing our customers with a comprehensive data-analytics-driven solution for de... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive Cadence achieved ASIL Level B in support of D (ASIL B(D))-compliant certification for its Tensilica ConnX B10 and ConnX B20 DSPs, which are designed for automotive radar, lidar, and vehicle-to-everything (V2X). SGS-TÜV Saar certified that the DSPs have support for random hardware faults and systematic faults. Synopsys is acquiring Moortec, whose process, voltage, and temperature... » read more

Electronics For Quantum Communications


Our secure digital communications so far have functioned on the principle of key-based encryption. This involves generating a key of appropriate length, which is then used to encrypt the data. Because distributing the keys is difficult, the keys are reused rather than regularly generating new ones. The regular use of the keys opens up the encryption process to attacks by mathematical methods... » read more

Customizing Low-Power Platforms Using UPF Dynamic Properties


Low power design and verification engineers need a way to continuously probe various dynamic properties of UPF objects in order to monitor the current state of a verification strategy and utilize that information to develop custom low-power verification environments. Unfortunately, there hasn’t been a reliable, formalized way to do this. Since availability of the dynamic properties of unif... » read more

Building Billions Of Batteryless Devices


Later this month, Arm will celebrate its 30 year anniversary and the engineering milestones that have resulted in more than 180 billion Arm-based chips being shipped in everything from sensors to smartphones to the world’s fastest supercomputer. In each of these cases, much of Arm’s success has been in our dedication to delivering the highest performance per watt. But while Arm may ha... » read more

The Expanding Universe Of MIPI Applications


It’s hard to imagine today, but there was a time when mobile phones had no cameras and displays were tiny monochrome LCDs capable of displaying a phone number and not much more. The iconic Nokia 3310 announced Sept. 1, 2000, had an 84 x 48 pixel monochrome display and went on to sell 126 million units worldwide. You may still have one in your junk drawer. By the time of the original iPhone... » read more

Designs Beyond The Reticle Limit


Designs continue to grow in size and complexity, but today they are reaching both physical and economic challenges. These challenges are causing a reversal of the integration trend that has provided much of the performance and power gains over the past couple of decades. The industry, far from giving up, is exploring new ways to enable designs to go beyond the reticle size, which is around 8... » read more

Dealing With Sub-Threshold Variation


Chipmakers are pushing into sub-threshold operation in an effort to prolong battery life and reduce energy costs, adding a whole new set of challenges for design teams. While process and environmental variation long have been concerns for advanced silicon process nodes, most designs operate in the standard “super-threshold” regime. Sub-threshold designs, in contrast, have unique variatio... » read more

Difficult Memory Choices In AI Systems


The number of memory choices and architectures is exploding, driven by the rapid evolution in AI and machine learning chips being designed for a wide range of very different end markets and systems. Models for some of these systems can range in size from 10 billion to 100 billion parameters, and they can vary greatly from one chip or application to the next. Neural network training and infer... » read more

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