Yield Enhancement Technology: Efforts To Suppress Nanosized Particles In Semiconductor Production Equipment

By TEL - 18 Nov, 2020 - Comments: 0

The currently dominant semiconductor process size is in the range between a few and a few dozen nanometers. That means if a nanosized particle smaller than a virus (hereinafter simply “particle”) is present on a silicon substrate, it could cause a defect in the semiconductor device, lowering the production yield (i.e., the percentage of good chips produced in a manufacturing process). Preve... » read more

Blog Review: Nov. 18

By Jesse Allen - 18 Nov, 2020 - Comments: 0

Arm's Roberto Lopez Mendez finds that holographic displays can now be achieved on mobile processors thanks to recent algorithmic and computational advances. Mentor's Colin Walls examines the reasons the consolidate a number of automotive sub-systems onto a smaller number of powerful ECU to reduce complexity and increase system reliability. Cadence's Paul McLellan takes a look at the devel... » read more

Uniquely Identifying PCBs, Subassemblies, And Packaging

By Bryon Moyer - 18 Nov, 2020 - Comments: 0

Securing the semiconductor supply chain is becoming much more difficult as devices increasingly are disaggregated, a shift being forced on the industry due to the rising cost of scaling and the need for more customization and faster time to market. Individual component IDs are an important starting point for supply chain trust, but they are no longer sufficient. Those components will end up ... » read more

Survey: eBeam Initiative Luminaries (formerly Perceptions) Survey Results

By eBeam Initiative - 18 Nov, 2020 - Comments: 0

Survey of 77 industry luminaries across 42 different companies in July 2020 says net neutral COVID-19 business impact by 2021, with 24% positive vs 20% negative predictions. Click here to view the survey results. » read more

Improving EUV Underlayer Coating Defectivity Using Point-Of-Use Filtration

By Brewer Science - 18 Nov, 2020 - Comments: 0

Authors: Aiwen Wu (Entegris, Inc. — United States), Hareen Bayana (Entegris GmbH — Germany), Philippe Foubert (imec — Belgium), Andrea Chacko and Douglas Guererro (Brewer Science, Inc. — United States). This paper describes efforts to leverage different filtration parameters, including retention ratings and membrane materials, to understand their impact on EUV underlayer coating defe... » read more

Manufacturing Bits: Nov. 17

By Mark LaPedus - 17 Nov, 2020 - Comments: 0

Intel’s gate-all-around FETs At the upcoming IEEE International Electron Devices Meeting (IEDM), Intel is expected to present papers on its efforts to develop gate-all-around transistors. One paper from Intel describes a more conventional gate-all-around transistor technology called a nanosheet FET. Another paper involves a next-generation NMOS-on-PMOS nanoribbon transistor technology. (F... » read more

Power/Performance Bits: Nov. 17

By Jesse Allen - 17 Nov, 2020 - Comments: 0

NVMe controller for research Researchers at the Korea Advanced Institute of Science and Technology (KAIST) developed a non-volatile memory express (NVMe) controller for storage devices and made it freely available to universities and research institutions in a bid to reduce research costs. Poor accessibility of NVMe controller IP is hampering academic and industrial research, the team argue... » read more

Disaggregation And Smarter Chips Shift Liability For Security

By Ed Sperling - 17 Nov, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss security on chips with Vic Kulkarni, vice president and chief strategist at Ansys; Jason Oberg, CTO and co-founder of Tortuga Logic; Pamela Norton, CEO and founder of Borsetta; Ron Perez, fellow and technical lead for security architecture at Intel; and Tim Whitfield, vice president of strategy at Arm. What follows are excerpts of that conversation,... » read more

The Next Big Leap: Energy Optimization

By Brian Bailey - 16 Nov, 2020 - Comments: 1

The relationship between power and energy is technically simple, but its implication on the EDA flow is enormous. There are no tools or flows today that allow you to analyze, implement, and optimize a design for energy consumption, and getting to that point will require a paradigm shift within the semiconductor industry. The industry talks a lot about power, and power may have become a more ... » read more

The Next Phase Of Computing

By Ed Sperling - 16 Nov, 2020 - Comments: 0

Apple's new M1 chip offers a glimpse of what's ahead, and not just from Apple. Being able to get 18 to 20 hours of battery life from a laptop computer moves the ball much farther down the field in semiconductor design. All of this is entirely dependent on the applications, of course. But what's important here is how much battery life and performance can be gained by designing hardware specif... » read more

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