Making Chips To Last Their Expected Lifetimes
By Ed Sperling - 21 Oct, 2020 - Comments: 2

Chips are supposed to last their lifetime, but that expectation varies greatly depending upon the end market, whether the device is used for safety- or mission-critical applications, and even whether it can be easily replaced or remotely fixed. It also depends on how those chips are used, whether they are an essential part of a complex system, and whether the cost of continual monitoring and... » read more

Side Wettable Flanks For Leadless Automotive Packaging
By Amkor - 21 Oct, 2020 - Comments: 0

The MicroLeadFrame (MLF)/Quad Flat No-Lead (QFN) packaging solution is extremely popular in the semiconductor industry. It is used in applications ranging from consumer electronics and communications to those requiring high reliability performance, such as the automotive industry. The wide acceptance of this packaging design is primarily due to its flexible form factors, size, scalability and t... » read more

Blog Review: Oct. 21
By Jesse Allen - 21 Oct, 2020 - Comments: 0

Rambus' Frank Ferro and IDC's Shane Rau compare the evolution of HBM and GDDR6, as well as the design tradeoffs and challenges of the two memory types. Mentor's Neil Johnson compares unit testing and formal property checking as first steps for verifying low-level RTL functionality. Synopsys' Patrick Carey considers the competing demands of delivering a product as soon as possible and maki... » read more

2019-2020 Mask Maker Survey Results
By eBeam Initiative - 21 Oct, 2020 - Comments: 0

The survey results of the 2019-2020 Mask Maker Survey from the eBeam Initiative. • Multi-Beam and EUV Trends Becoming Visible • 558,834 masks reported by 10 different companies than last year • Masks written with Multi-Beam Mask Writers more than doubled • EUV mask yield reported at 91% • MPC usage increasing at leading edge nodes Click here to see the presentation. » read more

Impact Of EUV Resist Thickness On Local Critical Dimension Uniformities For <30nm CD Via Patterning
By Coventor - 21 Oct, 2020 - Comments: 0

This paper describes the impact of extreme ultraviolet (EUV) resist thickness on <30 nm via local critical dimension uniformity (LCDU) measured during after development inspection (ADI) and after etch inspection (AEI). For the same post-etch CD targets, increasing resist thickness from 40 to 60 nm helped reduced CD variability. This work was performed via virtual fabrication using Coventor�... » read more

Manufacturing Bits: Oct. 20
By Mark LaPedus - 20 Oct, 2020 - Comments: 1

Thermometers for 3D measurements The National Institute of Standards and Technology (NIST) is developing a nano-thermometer technology that could one day take 3D temperature measurements at the microscopic scale. The project, called Thermal Magnetic Imaging and Control (Thermal MagIC), hopes to develop tiny thermometers based on magnetic nanoparticles. These tiny thermometers could be injec... » read more

Power/Performance Bits: Oct. 20
By Jesse Allen - 20 Oct, 2020 - Comments: 0

Benchmarking quantum layout synthesis Computer scientists at the University of California Los Angeles found that current compilers for quantum computers are inhibiting optimal performance and argue that better quantum compilation design could help improve computation speeds up to 45 times. The team designed a family of benchmark quantum circuits with known optimal depths or sizes, which cou... » read more

Increase In Analog Problems
By Brian Bailey - 19 Oct, 2020 - Comments: 6

Analog and mixed signal design has always been tough, but a resent survey suggests that the industry has seen significantly increased failures in the past year because the analog circuitry within an ASIC was out of tolerance. What is causing this spike in failures? Is it just a glitch in the data, or are these problems real? The answer is complicated, and to a large extent it depends heavily... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 16 Oct, 2020 - Comments: 0

Chipmakers and OEMs Intel is exiting the NAND flash market. SK Hynix and Intel announced that they have signed an agreement on Oct. 20, under which SK Hynix would acquire Intel’s NAND memory and storage business for $9 billion.The transaction includes the NAND SSD business, the NAND component and wafer business, and the Dalian NAND memory manufacturing facility in China. Intel will retain it... » read more

Week In Review: Design, Low Power
By Jesse Allen - 16 Oct, 2020 - Comments: 0

Tools & IP Cadence debuted System-Level Verification IP (System VIP), a suite of tools and libraries for automating SoC testbench assembly, bus and CPU traffic generation, cache-coherency validation, and system performance bottleneck analysis. Tests created using the System VIP solution are portable across Cadence simulation, emulation and prototyping engines and can also be extended to po... » read more

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