Week In Review: Manufacturing, Test


Chipmakers TSMC posted mixed results for the quarter, although there was a capital spending surprise. “It maintained its 2020 capex at $15B-$16B despite smartphone softness, primarily to support a strong 5nm ramp, led by demand from 5G and HPC customers,” said Weston Twigg, an analyst at KeyBanc, in a research note. “Despite lowering its industry outlook, TSMC still expects to grow its o... » read more

Week In Review: Design, Low Power


Si2 launched an industry-wide survey to identify planned usage and structural gaps for prioritizing and implementing artificial intelligence and machine learning in EDA. A recently formed Si2 Special Interest Group is conducting the survey as part of an effort to identify where industry collaboration will help eliminate deficiencies caused by a lack of common languages, data models, labels, and... » read more

Week In Review: Auto, Security, Pervasive Computing


COVID-19, IoT Last week, the United States’ Department of Health and Human Service (HHS) announced it will not enforce penalties for certain U.S. HIPAA Rules violations involving COVID-19 testing sites. HIPAA, the Health Insurance Portability and Accountability Act of 1996, protects privacy of health information. Lawyers are looking it over. "Even during the COVID-19 pandemic, providers are ... » read more

Scaling At The Angstrom Level


It now appears likely that 2nm will happen, and possibly the next node or two beyond that. What isn't clear is what those chips will be used for, by whom, and what they ultimately will look like. The uncertainty isn't about the technical challenges. The semiconductor industry understands the implications of every step of the manufacturing process down to the sub-nanometer level, including ho... » read more

Taking A Pulse On The IC Biz


It’s been a difficult period for the semiconductor industry. The coronavirus outbreak has put a damper on what was supposed to be a strong year in the semiconductor industry in 2020. Many are holding out hopes for a rebound in the second half of the year. That’s still a big unknown. The forecasts are gloomy. For example, VLSI Research has three different scenarios for the semiconduc... » read more

Metrology Challenges For Gate-All-Around


Metrology is proving to be a major challenge for those foundries working on processes for gate-all-around FETs at 3nm and beyond. Metrology is the art of measuring and characterizing structures in devices. Measuring and characterizing structures in devices has become more difficult and expensive at each new node, and the introduction of new types of transistors is making this even harder. Ev... » read more

Gradual Rebound Or Slight Dip


Uncertainty has gripped the silicon wafer market as the COVID-19 pandemic threatens to upend growth projections for 2020. Declines in both shipments and revenue plagued the silicon wafer market in 2019, a downturn that had given way to optimism for 2020 with rising expectations for normalizing inventory levels, memory market improvements, data center market growth and the 5G market takeoff. ... » read more

Making Chips At 3nm And Beyond


Select foundries are beginning to ramp up their new 5nm processes with 3nm in R&D. The big question is what comes after that. Work is well underway for the 2nm node and beyond, but there are numerous challenges as well as some uncertainty on the horizon. There already are signs that the foundries have pushed out their 3nm production schedules by a few months due to various technical issu... » read more

Artificial Intelligence Is Everywhere


It’s pretty hard to talk about technology today without artificial intelligence, or AI, entering into the conversation. It seems to be everywhere… and growing. Businesses are using it to operate more efficiently, it’s resulting in safer and more useful products, and it has the promise of allowing us to personalize our worlds as devices learn our preferences. The age of AI AI refers to t... » read more

Big Changes In Tiny Interconnects


One of the fundamental components of a semiconductor, the interconnect, is undergoing radical changes as chips scale below 7nm. Some of the most pronounced shifts are occurring at the lowest metal layers. As more and smaller transistors are packed onto a die, and as more data is processed and moved both on and off a chip or across a package, the materials used to make those interconnects, th... » read more

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