Don’t Get Stranded On Islands, Delete Them


No, this isn’t a Hollywood movie. We’re talking about pieces of plane shapes with no connections to them, not an idyllic private oasis in the Caribbean (sorry). Removing shape islands is something you’ve always been able to do in the Allegro layout environments, but the flow for achieving this has improved significantly in recent years. Come with us, and we’ll compare what the flow u... » read more

New Ways To Optimize Machine Learning


As more designers employ machine learning (ML) in their systems, they’re moving from simply getting the application to work to optimizing the power and performance of their implementations. Some techniques are available today. Others will take time to percolate through the design flow and tools before they become readily available to mainstream designers. Any new technology follows a basic... » read more

Security Verification For Processor-Based SoCs


By Ruud Derwig and Nicole Fern Security in modern systems is of utmost importance. Device manufacturers are including multiple security features and attack protections into both the hardware and software design. End-product system security, however, cannot be guaranteed by using a secure processor alone. The final product security results not only from using proven, secure hardware component... » read more

More Multiply-Accumulate Operations Everywhere


Geoff Tate, CEO of Flex Logix, sat down with Semiconductor Engineering to talk about how to build programmable edge inferencing chips, embedded FPGAs, where the markets are developing for both, and how the picture will change over the next few years. SE: What do you have to think about when you're designing a programmable inferencing chip? Tate: With a traditional FPGA architecture you ha... » read more

PCIe 5.0 Drill-Down


Suresh Andani, senior director of product marketing for SerDes IP at Rambus, digs into the new PCI Express standard, why it’s so important for data centers, how it compares with previous versions of the standard, and how it will fit into existing and non-von Neumann architectures. » read more

Building Security IntoThe DevOps Life Cycle


The primary goal when breaking the build in the CI/CD DevOps life cycle is to treat security issues with the same level of importance as quality and business requirements. If quality or security tests fail, the continuous integration server breaks the build. When the build breaks, the CI/CD pipeline also breaks. Based on the reason for the broken build, appropriate activities such as archite... » read more

Blog Review: April 1


Rambus' Steven Woo takes an in-depth look at on-chip memory for high performance AI applications and explores some of the primary differences between HBM and GDDR6. Synopsys' Taylor Armerding warns of the risks of legacy vulnerabilities, where software has problems that were never fixed then forgotten about or never discovered in the first place, and key steps for finding and addressing them... » read more

Utilizing IP Lifecycle to Author IP for Successful Reuse


Successful reuse of IP relies on the entire IP lifecycle. Developing and maintaining documentation, reference designs and test suites requires a significant effort. Learn how they are vital for reuse in this white paper. Click here to read more. » read more

How And Where ML Is Being Used In IC Manufacturing


Semiconductor Engineering sat down to discuss the issues and challenges with machine learning in semiconductor manufacturing with Kurt Ronse, director of the advanced lithography program at Imec; Yudong Hao, senior director of marketing at Onto Innovation; Romain Roux, data scientist at Mycronic; and Aki Fujimura, chief executive of D2S. What follows are excerpts of that conversation. Part one ... » read more

Solving the E/E Dilemma of Electric And Autonomous Vehicles


As automotive manufacturers and suppliers develop advanced technologies to realize the trends of autonomy, connectivity, electrification, and shared mobility, they are encountering a number of dilemmas as each trend drives different aspects of vehicle development. This paper will focus on the E/E design challenges created by electric and autonomous vehicles, and describe a multi-domain architec... » read more

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