Week In Review: Design, Low Power
By Jesse Allen - 13 Mar, 2020 - Comments: 0

Tools & IP Synopsys revealed DSO.ai (Design Space Optimization AI), an autonomous AI application that searches for optimization targets in very large solution spaces of chip design, inspired by the process of DeepMind's game-playing AlphaZero. DSO.ai engines ingest large data streams generated by chip design tools and use them to explore search spaces, observing how a design evolves over t... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 13 Mar, 2020 - Comments: 0

AI, machine learning Cadence says it has optimized its Tensilica HiFi digital signal processor IP to efficiently execute TensorFlow Lite for Microcontrollers, which are used in Google’s machine learning platform for edge. This means developers of AI/ML on the edge systems can now put better audio processing on edge devices with ML applications like keyword detection, audio scene detection, n... » read more

How Much Power Will AI Chips Use?
By Ed Sperling - 12 Mar, 2020 - Comments: 1

AI and machine learning have voracious appetites when it comes to power. On the training side, they will fully utilize every available processing element in a highly parallelized array of processors and accelerators. And on the inferencing side they, will continue to optimize algorithms to maximize performance for whatever task a system is designed to do. But as with cars, mileage varies gre... » read more

Packaging And Package Design For AI At The Edge
By Andy Heinig - 12 Mar, 2020 - Comments: 0

Industrial applications will acquire significantly more data directly from machines in coming years. To properly handle this increase in data, it must already be prepared at the machine. The data of the individual sensors can be processed, or an initial data merger can take place here at the so-called “edge.” Algorithms and methods from the field of artificial intelligence increasingly a... » read more

HBM2E Memory: A Perfect Fit For AI/ML Training
By Frank Ferro - 12 Mar, 2020 - Comments: 0

Artificial Intelligence/Machine Learning (AI/ML) growth proceeds at a lightning pace. In the past eight years, AI training capabilities have jumped by a factor of 300,000 (10X annually), driving rapid improvements in every aspect of computing hardware and software. Memory bandwidth is one such critical area of focus enabling the continued growth of AI. Introduced in 2013, High Bandwidth Memo... » read more

Demystifying Mirror Types
By Tyler Lockman - 12 Mar, 2020 - Comments: 0

I’m not talking about carnival funhouse mirrors, but rather the different options for mirroring symbols, vias, and bond fingers in your IC Package layout. The Allegro Package Designer Plus and SiP Layout tools have two distinct styles of mirroring which are used in different places. Often, I get questions about what, exactly, those differences are. And even more, why the styles are used for d... » read more

Die-to-Die Connectivity With High-Speed SerDes PHY IP
By Manuel Mota - 12 Mar, 2020 - Comments: 0

Hyperscale data center, artificial intelligence (AI), and networking SoCs have become more complex with advanced functionalities and have reached maximum reticle sizes. Designers are partitioning such SoCs in smaller modules requiring ultra- and extra-short reach links for inter-die connectivity with high data rates. The die-to-die connectivity must also ensure reliable links with extremely low... » read more

Avoiding Gloom With Better Knowledge
By Stephen Crosher - 12 Mar, 2020 - Comments: 0

The rate of product development is facing very real challenges as the pace of silicon technology evolution begins to slow. Today, we are squeezing the most out of transistor physics, which is essentially derived from 60-year-old CMOS technology. To maintain the pace of Moore’s law, it is predicted that in 2030 we will need transistors to be a sixth of their current size. Reducing transistor s... » read more

Aging Analysis Standard Solidifies Through Collaborative Effort
By Ahmed Ramadan - 12 Mar, 2020 - Comments: 0

By Ahmed Ramadan, Greg Curtis, Harrison Lee, Jongwook Kye, and Sorin Dobre We live in a connected world and it is estimated that by 20251 the total amount of worldwide data will swell to 163 ZB, or 163 trillion gigabytes. This rapid growth in data expansion is driving an explosion in new designs and new requirements for consumer, data center, automotive, and Internet of Things (IoT) applicat... » read more

Choosing The Right Level Of Programmability
By Tommy Mullane - 12 Mar, 2020 - Comments: 0

Designers prefer to design in flexibility. The reasons are legion and mostly obvious: you may not know today how a chip will be used tomorrow – best to delay setting anything in concrete until you are sure how it is going to be used. You may not fully understand the design until it is nearing completion, and premature optimization can leave you in a difficult situation. And there are more pra... » read more

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