Moving To GAA FETs


How do you measure the size of a transistor? Is it the gate length, or the distance between the source and drain contacts? For planar transistors, the two values are approximately the same. The gate, plus a dielectric spacer, fits between the source and drain contacts. The contact pitch, limited by the smallest features that the lithography process can print, determines how many transistors ... » read more

Impact Of Coronavirus Could Threaten Global Electronics Growth


Data through December showed a steady recovery in the global electronic supply chain with SEMI equipment leading the way in 3/12 growth (Chart 1). The global purchasing managers index moved into expansion territory (PMI>50) in January indicating accelerating growth in world manufacturing activity (Chart 2). But in late January the Coronavirus (COVID-19) began to make its negative impact f... » read more

Meeting Commercial Demands With XM3 Module Platform


While silicon carbide (SiC) is still considered a relatively new material in the semiconductor market, it is now used in power circuitry that supports our everyday lifestyle — from the data centers that deliver our emails, to solar power grids that provide energy to offices and homes, to electric cars and trains we use to commute, and in factory equipment and robots that manufacture the goods... » read more

Demand Picks Up For 200mm


Demand is growing for both 200mm fab capacity and equipment, setting the stage for possible shortages in coming months. But there are also some uncertainties, if not warning signs, in the 200mm market and the entire IC industry. Trade disputes, as well as the current coronavirus outbreak in China, likely will impact the chip and equipment markets. The size of the impact and the duration rema... » read more

Using New Technologies On Smaller Wafers


The industry is no longer held captive by sales from computing applications, such as personal computers, servers or even cellular phones and tablets. A diverse range of markets are contributing to growth seen by Lam and our customers. Cloud storage, machine learning or artificial intelligence (AI), virtual reality (VR) and augmented reality (AR), robotics, medical and automotive, including the ... » read more

Wrestling With Variation In Advanced Node Designs


Variation is becoming a major headache at advanced nodes, and issues that used to be dealt with in the fab now must be dealt with on the design side, as well. What is fundamentally changing is that margin, which has long been used as a buffer for variation and other manufacturing process-related problems, no longer works in these leading-edge designs for a couple of reasons. First, margin im... » read more

Blog Review: Feb. 19


Arm's Urmish Thakker takes a look at TinyML, some of the challenges in developing efficient architectures for resource constrained devices, and an explanation of Kronecker product compression. Mentor's Colin Walls considers whether it's better to use single or multiple returns for a function when writing understandable, readable code. Cadence's Paul McLellan shares highlights from a prese... » read more

Understanding SLAM (Simultaneous Localization And Mapping)


Amol Borkar, senior product manager for AI and computer vision at Cadence, talks with Semiconductor Engineering about mapping and tracking the movement of an object in a scene, how to identify key corners in a frame, how probabilities of accuracy fit into the picture, how noise can affect that, and how to improve the performance and reduce power in these systems. » read more

Manufacturing Bits: Feb. 18


Molecular layer etch The U.S. Department of Energy’s Argonne National Laboratory has made new advances in the field of molecular layer etching or etch (MLE). MLE is related to atomic layer etch (ALE). Used in the semiconductor industry, ALE selectively removes targeted materials at the atomic scale without damaging other parts of the structure. ALE is related to atomic layer deposition... » read more

EDA In The Cloud


Michael White, director of product marketing for Calibre physical verification at Mentor, a Siemens Business, looks at the growing compute requirements at 7, 5 and 3nm, why the cloud looks increasingly attractive from a security and capacity standpoint, and how the cloud as well as new lithography will affect the cost and complexity of developing new chips. » read more

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