Using Manufacturing Data To Boost Reliability


As chipmakers turn to increasingly customized and complex heterogeneous designs to boost performance per watt, they also are demanding lower defectivity and higher yields to help offset the rising design and manufacturing costs. Solving those issues is a mammoth multi-vendor effort. There can be hundreds of process steps in fabs and packaging houses. And as feature sizes continue to shrink, ... » read more

The 5G Rollout: Solving Advanced RF Metrology Challenges


The global radio frequency (RF) semiconductor market size is growing rapidly at a compound annual growth rate of 8.5%, with an expected increase from $17.4 billion in 2020 to $26.2 billion in 2025, according to Research and Markets [1]. As many are aware, the rollout of 5G technology and the Internet of Things (IoT), which is enabled by 5G, are the main driving forces for this growth. Growth... » read more

Speeding Up Scan-Based Volume Diagnosis


In the critical process known as new-product bring-up, it’s a race to get new products to yield as quickly as possible. But the interplay between increasingly complex aspects of designs and process makes it difficult to find root causes of yield issues so they can be fixed quickly. Advanced processes have very high defectivity, and learning must be fast and effective. While progress has be... » read more

Deep Learning Delivers Fast, Accurate Solutions For Object Detection In The Automated Optical Inspection Of Electronic Assemblies


When automated optical inspection (AOI) works, it is almost always preferable to human visual inspection. It can be faster, more accurate, more consistent, less expensive, and it never gets tired. However, some tasks that are very simple for humans are quite difficult for machines. Object detection is an example. For example, shown an image containing a cat, a dog, and a duck, a human can insta... » read more

Streaming Scan Network: An Efficient Packetized Data Network For Testing Of Complex SoCs


Originally presented at the 2020 International Test Conference by Siemens and Intel authors, this paper describes the Tessent Streaming Scan Network technology and demonstrates how this packetized data network optimizes test time and implementation productivity for today’s complex SoCs. The author-submitted version of the IEEE paper is reprinted here with permission. Authors: Jean-Françoi... » read more

Optimizing System Performance At Runtime


Silicon lifecycle management (SLM) is one of the hottest emerging topics in the semiconductor industry. Chip and system developers face relentless demands for ever greater performance, reliability, functional safety, and security along with lower power consumption and silicon cost. Key applications driving these demands include data centers, autonomous vehicles, complex consumer devices such as... » read more

HSIO Loopback Turns Challenges Into Opportunities For Test At 112 Gbps


By Dave Armstrong and Don Thompson For both PCIe and Ethernet (IEEE 802.3,) signals are getting mighty small. With PCIe 5 reaching 32 Gbps (NRZ at 32 GBaud) and 802.3 reaching 112 Gbps (PAM4 at 56 GBaud), typical eye-mask limits are shrinking. Consequently, test requirements for high-speed I/O (HSIO) test are becoming daunting. HSIO test involves measurement of Tx eye height and width, co... » read more

Case Study — Deep Learning For Corner Fill Inspection And Metrology On Integrated Circuits


CyberOptics utilized deep learning to accurately inspect the corner fill on integrated circuits (ICs) produced by a large memory supplier. Traditional methods of inspection showed limitations in their ability to entirely detect the presence and absence of fill, indicating that a more advanced approach was necessary. CyberOptics drew on its large pool of algorithm and neural network expertise to... » read more

Success Stories For Packetized Scan Data


Some new design-for-test (DFT) technologies are difficult, expensive, or risky to implement but offer significant benefits. Other technologies are easy to implement but offer minor improvements. The calculation of whether (or when) to adopt new technology includes consideration of the pressures of DFT today—design complexity, the lack of flexibility in hardwiring scan channels, the proliferat... » read more

Big Payback For Combining Different Types Of Fab Data


Collecting and combining diverse data types from different manufacturing processes can play a significant role in improving semiconductor yield, quality, and reliability, but making that happen requires integrating deep domain expertise from various different process steps and sifting through huge volumes of data scattered across a global supply chain. The semiconductor manufacturing IC data... » read more

← Older posts Newer posts →