category: Top Stories

category: Auto, Security & Edge AI

Executive Insight: Raik Brinkmann
By Ed Sperling - 06 Jul, 2016 - Comments: 0

[getperson id="11306" comment="Raik Brinkmann"], president and CEO of [getentity id="22395" e_name="OneSpin Solutions"], sat down with Semiconductor Engineering to discuss where and why formal verification is gaining traction, and how it fits alongside other verification approaches. What follows are excerpts of that conversation. SE: [getkc id="33" kc_name="Formal"] has been around for a whi... » read more

GPUs Power Ahead
By Ann Mutschler - 05 Jul, 2016 - Comments: 0

GPUs, long a sideshow for CPUs, are suddenly the rising stars of the processor world. They are a first choice in everything from artificial intelligence systems to automotive ADAS applications and deep learning systems powered by [getkc id="261" kc_name="convolutional neural network"]. And they are still the mainstays of high-performance computing, gaming and scientific computation, to name ... » read more

Uncertainty Rocks Chip Market
By Ed Sperling - 30 Jun, 2016 - Comments: 1

The semiconductor industry is undergoing sweeping changes in every direction, making it far more difficult to figure out which path to take next, when to take it, and how to get there. The next few years will redefine which semiconductor companies emerge as leaders, which ones get pushed down or out or absorbed into other companies, and which markets will be the most lucrative. And that coul... » read more

Electrical-Mechanical Tool Flow Revisited
By Ann Mutschler - 30 Jun, 2016 - Comments: 0

For many years, the design tool industry has entertained the idea of combining both electrical and mechanical design into a single user experience, with a single database as a foundation. Major tool vendors, at least on the electrical side, have taken the matter seriously and confirm that activities towards a single flow have been considered, particularly as the [getkc id="7" kc_name="EDA"] ... » read more

Can Verification Meet In The Middle?
By Brian Bailey - 30 Jun, 2016 - Comments: 0

Since the dawn of time for the EDA industry, the classic V diagram has defined the primary design flow. On the left hand side of the V, the design is progressively refined and partitioned into smaller pieces. At the bottom of the V, verification takes over and as you travel up the right-hand side of the V, verification and integration happens until the entire design has been assembled and valid... » read more

Will Open-Source Work For Chips?
By Brian Bailey - 30 Jun, 2016 - Comments: 2

Open source is getting a second look by the semiconductor industry, driven by the high cost of design at complex nodes along with fragmentation in end markets, which increasingly means that one size or approach no longer fits all. The open source movement, as we know it today, started in the 1980s with the launch of the GNU project, which was about the time the electronic design automation (... » read more

System-Level Verification Tackles New Role
By Brian Bailey - 15 Jun, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss advances in system-level verification with Larry Melling, product management director for the system verification group of [getentity id="22032" e_name="Cadence"]; Larry Lapides, vice president of sales for [getentity id="22036" e_name="Imperas”] and Jean-Marie Brunet, director of marketing for the emulation division of [getentity id="22017" e_nam... » read more

Plotting The Next Semiconductor Road Map
By Ed Sperling - 13 Jun, 2016 - Comments: 0

The semiconductor industry is retrenching around new technologies and markets as Moore's Law becomes harder to sustain and growth rates in smart phones continue to flatten. In the past, it was a sure bet that pushing to the next process node would provide improvements in power, performance and cost. But after 22nm, the economics change due to the need for multi-patterning and finFETs, and th... » read more

Spec-Driven Design
By Ed Sperling - 10 Jun, 2016 - Comments: 0

Anupam Bakshi, CEO of Agnisys, sat down with Semiconductor Engineering to discuss problems in the design flow and what needs to be fixed. What follows are excerpts of that conversation. SE: What are the big problems facing the industry? Bakshi: There is a disconnect from the specification down to the implementation. That's why verification has become so big. Specification down to implemen... » read more

System-Level Verification Tackles New Role
By Brian Bailey - 09 Jun, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss advances in system-level verification with Larry Melling, product management director for the system verification group of [getentity id="22032" e_name="Cadence"]; Larry Lapides, VP of sales for [getentity id="22036" e_name="Imperas”] and Jean-Marie Brunet, director of marketing for the emulation division of [getentity id="22017" e_name="Mentor Gr... » read more

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