Resolving Particle Issues In Photolithographic Scanners


Case Study: It’s essential to quickly identify the source of airborne particles in photolithographic scanners — both to coordinate and confirm the effects of cleanings and repairs. Regrettably, most traditional methods for detecting particles have trouble addressing particle issues proactively. Consider in-situ methods as an example. Conventional in-situ scanners do not provide access to... » read more

New Test Methods For 5G Wafer High-Volume Production


In order to provide the chips required for this change in the landscape, there will be a large number of changing requirements in wafer test that come out of these architectural requirements. Form Factor partnered with Intel to investigate these changes, and tested one such example of a new test methodology. In a joint collaboration with Intel to develop a test methodology for their 5G RF-So... » read more

The Importance Of Chiplet Security


Chiplets are gaining significant traction as they deliver numerous benefits beyond what can be accomplished with a monolithic SoC in a time of slowing transistor scaling. However, disaggregating SoCs into multiple chiplets increases the attack surface which adversaries can exploit to penetrate safeguards to data and hardware. With chiplets, the risks of hardware-based trojans and exploits such ... » read more

The Advantages Of MBSE-Driven E/E Architecture


Vehicles in all sectors are growing in complexity as OEMs develop sophisticated platforms with growing levels of automation and connectivity. To cope with this growing complexity, automotive, aerospace and commercial vehicle OEMs must evolve their architectural design processes to leverage MBSE and the digital thread. Today’s E/E system engineering solutions help companies implement MBSE by p... » read more

Startup Best Practices


Adopting best practices and methodology early will lay the foundation to create a design team that is built to last. While taking the time to develop and implement best practices seems like a luxury a startup cannot afford, nothing is farther from the truth. Best practices are best implemented right from the beginning so it seeps into the DNA of the design team and will pay rich dividends as th... » read more

Build Security Into Your SDLC With Coverity


Are your developers getting discouraged by too many false positives from security tools that slow them down? You need a solution that boosts their productivity, finds real vulnerabilities, and provides expert remediation guidance. Coverity will help you achieve this and more. Learn about Coverity’s unique technical capabilities and why it should be your go-to solution for static analysis secu... » read more

3D PCB Design And Analysis: ECAD/MCAD And Where They Converge


The design of a board and its ‘home’ are heavily interdependent. They require careful consideration to ensure everything will be in working order when your product is ultimately brought to market. Many designs have been derailed by conflicts between ECAD and MCAD. Something as simple as an improperly placed / communicated mounting hole can send your project into a tailspin of re-designs. ... » read more

Creating Domain-Specific Processors Using Custom RISC-V ISA Instructions


When System-on-Chip (SoC) developers include processors in their designs, they face choices in solving their computational challenges. Complex SoCs will usually have a variety of processor cores responsible for varied functions such as running the main application programs, communications, signal processing, security, and managing storage. Traditionally, such cores have been in distinct categor... » read more

Increase LVS Verification Productivity In Early Design Cycles


With the innovative Calibre nmLVS-Recon early verification tool, designers can run targeted short isolation analysis and debugging on blocks, macros and chips in early design phases. The Calibre nmLVS-Recon short isolation use model focuses on fast, efficient, prioritized short isolation and short paths debugging. To read more, click here. » read more

Formal Solutions For SystemC/C++ Verification


OneSpin Solutions provides its popular 360 DV formal verification product line, which allows for both the automated checking and full assertion-based verification of SystemC/C++ design representations. This solution extends the verification capability that may be applied to abstract designs, coded in SystemC/C++ for many different use models. This white paper describes the OneSpin solution a... » read more

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