Synchronous Die-to-Die Signaling Using Aeonic Connect


This paper presents a system providing accurate clock alignment for on-die and die-to-die synchronous circuits. A low-frequency reference clock provides an accurate timing reference with low power consumption, while distributed delay lines align the endpoints of loosely constrained clock trees. For on-die clocks, this synchronization strategy severs the traditional relationship between power an... » read more

Calibre DesignEnhancer Design-Stage Layout Modification Improves Power Management Faster And Earlier


The faster a design can progress from implementation to signoff verification, the better the chances are of meeting tapeout schedules. The Calibre DesignEnhancer platform offers P&R and custom/analog design teams a fast, integrated environment for implementing Calibre-clean design modifications to reduce IR drop and EM and prepare for physical verification. Not only can designers reduce EM and ... » read more

Protecting Data And Devices Now And In The Quantum Computing Era


Quantum computing is being pursued across industry, government and academia with tremendous energy and is set to become a reality in the not-so-distant future. Once sufficiently large quantum computers exist, traditional asymmetric cryptographic methods for key exchange and digital signatures will be broken. Many initiatives have been launched throughout the world to develop and deploy new quan... » read more

PCIe 6.0 Electrical Testing For High Data-Bandwidth Applications


For nearly three decades, PCI Express® (PCIe®) technology has been the standard interconnect inside computers providing high bandwidth and low latency to meet customer demand. However, as the industry needs to evolve, so does the standard, keeping pace and driving future innovation. PCIe 6.0 is ubiquitous and offers power-efficient performance and high bandwidth for latency-sensitive appli... » read more

Study On HPC And Cloud Computing For Engineering Simulation


In engineering applications, cloud computing can provide the on-demand compute power needed to run increasingly more complex simulations on a more frequent basis throughout the design cycle. Simulation plays an increasingly important role in the development of disruptive new technologies and systems such as autonomous vehicles, digital manufacturing, next-generation aircraft, and more. Rapid, h... » read more

Spectre-BHB: Speculative Target Reuse Attacks Version 1.7


In March 2022, researchers within the Systems and Network Security Group at Vrije Universiteit Amsterdam disclosed a new cache speculation vulnerability known as Branch History Injection (BHI) or Spectre-BHB. Spectre-BHB is similar to Spectre v2, except that malicious code uses the shared branch history (stored in the CPU Branch History Buffer, or BHB) to influence mispredicted branches within ... » read more

Low Density Of LPDDR4x DRAM — The Best Choice For Edge AI


Edge AI computes the data as close as possible to the physical system. The advantage is that the processing of data does not require a connected network. The computation of data happens near the edge of a network, where the data is being developed, instead of in a centralized data-processing center. One of the biggest benefits of edge AI is the ability to secure real-time results for time-sensi... » read more

Innovative NoC Implementation Dramatically Speeds Derivative Design


The Inuitive team faced a significant challenge when developing a derivative design based on the NU4000, their first vision-on-chip processor. The NU4000 employs the Advanced eXtensible Interface (AXI) on-chip communication bus protocol developed by Arm. However, removing one of the NU4000’s three vector cores resulted in access to only a limited number of AXI ports. The problem was that ... » read more

5th Generation CAPSENSE Technology


Capacitive touch sensing is a familiar and popular way to implement sleek, attractive and intuitive human-machine interfaces (HMIs) in devices such as smartphones, tablets and automotive displays. Now many manufacturers operating elsewhere, including in the industrial automation and home appliance markets, are exploring ways to increase the appeal, usability and value of their products by re... » read more

Shift Left With Calibre To Optimize IC Design Flow Productivity, Design Quality, And Time To Market


Every IC designer strives to create a “clean,” or error-free, cell, block, chiplet, SoC, or 3DIC assembly before passing their work downstream for full sign-off verification. However, waiting until sign-off verification to find out how well you did is probably the least efficient approach to achieving production-ready layouts, impacting engineer productivity, project schedules, and hardware... » read more

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