How Low Can You Go? Pushing The Limits Of Transistors


Deep low voltage enablement of embedded memories and logic libraries to achieve extreme low power: Rising demand for cutting-edge mobile, IoT, and wearable devices, along with high compute demands for AI and 5G/6G communications, has driven the need for lower power systems-on-chip (SoCs). This is not only a concern for a device’s power consumption when active (dynamic power), but also when... » read more

17 Equations That Changed The World


Mathematics has been a constant part of our lives forever and is used in many ways in our everyday lives. Created by Ian Stewart, listed on Dr. Paul Coxon’s Twitter account, and discussed on mathematics blogger Larry Philip’s site is a list of the “17 Equations that Changed the World,” many of which have been mentioned on The Big Bang TheoryTV series. However, the list is incomplete.... » read more

Learn The Architecture — Memory System Resource Partitioning And Monitoring (MPAM) Overview


This guide introduces the Memory System Resource Partitioning and Monitoring (MPAM), an optional addition to the Arm architecture to support memory system partitioning. MPAM is documented in the Memory System Resource Partitioning and Monitoring (MPAM), for A-profile architecture Arm Architecture Reference Manual Supplement. Click here to read more. » read more

New Wafer-Like And Reticle-Like Sensors Deliver Fast, Easy Measurements Inside The Process Chamber


Setup and maintenance operations for semiconductor manufacturing tools can be tedious, time-consuming, and expensive, incurring both direct costs for personnel and resources and indirect costs for lost tool time during extended commissioning of new tools and requalification of repaired or serviced tools. Wafer-like (and reticle-like) sensors (WaferSense® from CyberOptics) provide fast, easy ac... » read more

How The Doubling Of Interconnect Bandwidth With PCI Express 6.0 Impacts IP Electrical Validation


As a result of the innovations taking place in CPUs, GPUs, accelerators, and switches, the interface in hyperscale datacenters now requires faster data transfers both between compute and memory and onto the network. PCI Express (PCIe®) provides the backbone for these interconnects and is used to build protocols such as Computer Express Link (CXL™) and Universal Chiplet Interconnec... » read more

Epi SiGe Application Using METRION In-Line SIMS System


The epitaxial process is a well-established deposition technique in semiconductor fabrication because it enables the ability to achieve much higher doping concentrations than can be obtained via ion implantation. As we move toward <5nm technology, a key process for enabling gate-all-around FET (GAAFET) is the stacked multi-lattice of Silicon (Si) and Silicon-germanium (SiGe) epi process for ... » read more

Lightweight Cryptography: An Introduction


The National Institute of Standards and Technology (NIST) announced on February 7, 2023, that it had selected the ASCON algorithm to become the standard for Lightweight Cryptography. In this whitepaper, we will explore what lightweight cryptography is and why it is worth considering for specific Internet of Things (IoT) use cases. Download this white paper to learn: What lightweight cry... » read more

Design Challenges And Opportunities For Electric Powertrain With Vehicle Autonomy


According to recent studies, nearly 25% of all miles driven in the United States could be shared autonomous electrical vehicles (SAEVs) by 2030. Electric powertrain is indispensable for autonomous vehicles as it offers a) higher fuel efficiency and reduced CO2 emissions, b) an easier platform to support drive-by-wire systems needed for vehicle autonomy, and c) as battery prices keep dropping sh... » read more

Design IP


Cadence is a leader in semiconductor IP addressing hyperscale computing, enterprise, data center, automotive, and artificial intelligence/machine learning (AI/ML) applications. Our IP are available in advanced-process nodes ranging from 28nm to 3nm—all silicon verified in leading-edge foundry processes. Our memory IP portfolio spans DDR, LPDDR, and GDDR. The Cadence® IP family for PCI Expres... » read more

How To Build A Rock-Solid Software Security Initiative


Application security testing is the starting block, not the finish line. While a critical component of every security program, the “penetrate and patch” approach is not a strategy. You need a complete program to lower risk exposure, measure progress, and demonstrate results. The most effective AppSec programs—or software security initiatives—are fine-tuned to their respective organiz... » read more

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