Better, Faster, And More Efficient Verification With The Power Of AI


Verification is often the most challenging part of the chip development process. Verification engineers have to balance quality of results (QOR) with time to results (TTR) and cost of results (COR). AI and ML technologies can play a significant part in increasing QOR, speeding up TTR, and reducing COR. This white paper outlines some of the major challenges for verification, describes how AI pro... » read more

Surfscan SP3/Ax Unpatterned Wafer Inspection Systems


Unpatterned wafer inspection systems are used for process qualification, tool qualification, tool monitoring, outgoing wafer quality control, incoming wafer quality control, and process debug. Learn more about a system from KLA that identify defects and wafer surface quality issues that affect the performance and reliability of chips manufactured for the automotive, IoT, 5G, consumer electronic... » read more

In-Design Thermal Analysis For MMIC And RF PCB Power Applications


Next-generation wireless communication and radar systems often demand increased RF power within a smaller footprint to meet the performance and size requirements of their respective commercial and aerospace applications. As a result, RF front-end electronics are exposed to the risk of higher operating temperatures, which degrade RF performance and threaten device reliability. For many device ma... » read more

Enabling Model-Based Design For DO-254 Certification Compliance


The increasing prevalence and cost of projects that need to comply with the DO-254 standard is forcing companies to evaluate their development processes. This white paper shows a development approach to compliance using model-based design. It covers how a DO-254 workflow using model-based design promotes a consistent requirements-oriented project view and increases reuse of design and verificat... » read more

Rambus RT-640 Road To ISO 26262 Certification


Modern vehicles incorporate an increasing number of complex integrated circuits. Failures in automotive systems can lead to damage to property, injury or loss of life. Ensuring the reliability of electronic systems is crucial, and the ISO26262 standard documents the requirements for determining automotive functional safety. This white paper details the process for how Rambus achieved the ISO262... » read more

Ensure Functional Safety Using Siemens’ AUTOSAR Solutions


As the prevalence of automated driving, electrification, and connected vehicle applications increases, the complexity of electrical and electronic (E/E) vehicle architecture is increasing, and vehicle safety requirements are becoming more demanding. Solution architects and engineers are looking for ways to manage it all. And they can, with the help of our comprehensive AUTOSAR solution that pro... » read more

Power Methodology For Estimation And Optimization In The ASIC/SoC Flow


In this white paper, we’ll review the many steps of today’s common ASIC/SoC power methodologies and tool flows. We’ll then propose ways you can further optimize your power methodology to more quickly achieve your PPW goals. Please note, while we acknowledge that energy consumption in digital CMOS logic is a combination of dynamic power and leakage, to keep this white paper to a digestible... » read more

Optimize 5G New Radio MIMO Test And Debug


Radio technology is evolving from single antenna transmit-receive communication systems to multiple-input multiple-output (MIMO) antenna communication systems. MIMO technology is a wireless communication technique for sending and receiving multiple data signals simultaneously over the same radio channel. MIMO techniques play a prominent role in Wi-Fi communications, as well as in 4G long-term e... » read more

Timing Accuracy For eCPRI Fronthaul And Open RAN


Open RAN is an eCPRI-based open fronthaul interface between the radio unit (RU) and distributed unit (DU) [1]. This white paper discusses timing accuracy for eCPRI fronthaul transport networks. The eCPRI interface is supported by packet switched fronthaul transport networks. When the fronthaul network is used to synchronize an eCPRI node, it must provide timing at the user network interface acc... » read more

Machine Learning-Driven Full-Flow Chip Design Automation


To enable the semiconductor industry to continue growing, the chip design process must become more efficient. With the availability of massive, cloud-enabled, distributed computing and advancements in machine learning computer science, the next chip design automation revolution is now possible. The Cadence® Cerebrus™ Intelligent Chip Explorer utilizes both of these technologies, based o... » read more

← Older posts Newer posts →