Securing Next-Gen 5G And IoT With Defensics Fuzzing


Expansion of the IoT brings new security challenges The evolution of 5G technologies continues to drive advancement in Internet of Things (IoT) devices and their applications. By 2025, experts predict there will be nearly 4 billion IoT mobile connections in the world, and more than 64 billion IoT devices by 2026. In addition to enabling superior performance and efficiency, 5G expands the ... » read more

Tensilica DSPs Support In Eigen Library


Eigen is a high-level C++ library of template headers for linear algebra, matrix and vector operations, geometrical transformations, numerical solvers, and related algorithms. Eigen is open-source software licensed under the Mozilla Public License 2.0 (MPL2). Eigen is implemented using the expression templates metaprogramming technique, meaning it builds expression trees at compile time... » read more

Comprehensive S-Parameter Verification Coverage With Analog FastSPICE


IC design is transforming at an accelerated pace along with fabrication technology. The need to incorporate more functionality has led to denser dies, multi-die chips, stacked 3D ICs and advanced packaging. Furthermore, design technology continues to progress towards supporting higher data rates to address the increasing demand for more and enhanced connectivity. We now must deal with much more... » read more

Extending RISC-V Processors In The Field With Codasip Studio & Menta eFPGA


RISC-V is an open specification that allows an infinite number of implementations. But RISC-V goes beyond that and encourages processor architects to add new instructions to accelerate certain algorithms or application domains, for example DSP, AI/ML, and others, while keeping the base instruction set stable. The new instructions may help with the performance, code size, power consumption, or d... » read more

Speed Up Early Design Rule Exploration And Physical Verification


Ensuring that early-stage IC design physical verification actually enhances IC design and verification productivity means giving engineers the ability to focus on those errors that are both valid and critical in early-stage designs. The Calibre nmDRC Recon functionality provides selective DRC of early-stage designs that focuses on real, relevant errors, ignoring rule checks that generate meanin... » read more

Accelerate The Algorithm To Silicon Development With Stratus HLS


Growth in demand for artificial intelligence (AI) and digital signal processing (DSP) applications, coupled with advances in semiconductor process technology, drives increasingly denser SoCs. These complex SoCs further challenge the design team’s ability to meet performance, power, and area (PPA) goals within tight time-to-market windows. We need automated and targeted solutions that efficien... » read more

Heterogeneous Assembly Datasheet


Medical and biotech devices often include optical, chemical, RF, and liquid elements. Some are combined with electronic devices to increase functionality or interaction with the environment. To produce these devices, multiple technologies are combined in a cost-effective way, ideally using a rapid process development cycle to minimize time to market. Combining technologies, as well as combining... » read more

Pathfinding By Process Window Modeling: Advanced DRAM Capacitor Patterning Process Window Evaluation Using Virtual Fabrication


In advanced DRAM, capacitors with closely packed patterning are designed to increase cell density. Thus, advanced patterning schemes, such as multiple litho-etch, SADP and SAQP processes may be needed. In this paper, we systematically evaluate a DRAM capacitor hole formation process that includes SADP and SAQP patterning, using virtual fabrication and statistical analysis in SEMulator3D. The pu... » read more

Nova METRION Use Cases


Several use cases that we will explore for the Nova METRION® system include contamination control, process excursion prevention, reactor matching, and uniformity control. The objectives of these use cases are to detect contaminants which can kill devices, improve barrier layer and source/drain function, maintain deposition uniformity that impacts downstream processes, and ensure wafer-to-wafer... » read more

Meeting Cost And Technology Requirements Using MLF/QFN


MicroLeadFrame (MLF)/ quad flat no-lead (QFN) packaging technology is the fastest growing IC packaging solution today. From a market segment perspective, MLF packaging solutions represent more than a 111B-unit market for 2022 across five markets: automotive, consumer, industrial, networking, and communications (Figure 1). The package solution requirements across these markets vary but, the fund... » read more

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