Technology Advancements For Dynamic Function eXchange In Vivado ML Edition


As systems become more complex and designers are asked to do more with less, adaptability is a critical asset. While Xilinx FPGAs and SoCs always provided the flexibility to perform on-site device reprogramming, current constraints including increased cost, tighter board space, and power consumption demand even more efficient design strategies. Xilinx Dynamic Function eXchange (DFX) extends the... » read more

Addressing Library Characterization And Verification Challenges Using ML


At advanced process nodes, Liberty or library (.lib) requirements are more demanding due to design complexities, increased number of corners required for timing signoff, and the need for statistical variation modeling. This results in an increase in size, complexity, and the number of .lib characterizations. Validation and verification of these complex and large .lib files is a challenging task... » read more

Data Center Evolution: The Leap To 64 GT/s Signaling With PCI Express 6.0


The PCI Express (PCIe) interface is the critical backbone that moves data at high bandwidth and low latency between various compute nodes such as CPUs, GPUs, FPGAs, and workload-specific accelerators. With the torrid rise in bandwidth demands of advanced workloads such as AI/ML training, PCIe 6.0 jumps signaling to 64 GT/s with some of the biggest changes yet in the standard. Download this w... » read more

Augment Or Replace? How IAST Fits Into The AppSec Landscape


As the pace, volume, and complexity of application development continue to escalate, it becomes increasingly difficult to maintain software security and quality. More speed, more volume, and more complexity too often lead to less security and less quality. Interactive application security testing (IAST) is an exciting option for organizations looking to maintain both the speed and complexity... » read more

Innovative Top-Side Cooled Package Solution For High-Voltage Applications


This application note shows the benefits of using top-side cooled (TSC) power devices in high-voltage (HV) applications. In addition, it should help designers of such applications to understand how the device can be used and how an efficient and easy-to-assemble approach can be chosen to integrate TSC devices into the system. This application note describes Infineon’s new heat-spreader dual s... » read more

Veloce Coverage App And Veloce Assertion App Deliver Unified Coverage Methodology


The interoperability of the Veloce Coverage app and the Veloce Assertion app with other verification engines (simulation and formal) enables merging coverage collected by each engine and provides a cohesive coverage closure report and analysis flow. It enables the verification team and product-level management to make important decisions such as coverage closure sign-off, test quality analysis ... » read more

Comparing And Spotting The Difference Between Two Simulations


Comparing is a basic skill we all use in our daily lives in order to understand reality and analyze situations. When it comes to chip verification, the fundamental task of checking also involves comparing because checking is always "checking vs. something" — the ASIC specification and/or a model. In practice, when we encounter a failing test, oftentimes we have a comparable passing tes... » read more

Leveraging Multi-Protocol PHY For PCIe To Cope With SoC Design Complexity


Now in the post-Moore’s Law era, the fast-evolving semiconductor market is continually geared toward higher performance and feature-rich integrated chip (IC) solutions. More functional design blocks integrated with growing interconnections—to not only increase the overall throughput but also expand the I/O connectivity—resulted in a more powerful system on chip (SoC). This increasing comp... » read more

6G: Going Beyond 100 Gbps To 1 Tbps


6G research is in its very early stages. The vision for what the International Telecommunication Union calls Network 2030 continues to take shape. While the industry is years away from starting the standards development process, subterahertz (sub-THz) territory is a focus of active research. Getting to 100 gigabits per second (Gbps) to 1 terabit per second (Tbps) data throughput is a key obj... » read more

Metal Thermal Interface Material For The Next Generation FCBGA


Thermal interface materials (TIMs) have been widely adopted for improved thermal dissipation in flip chip ball grid array (FCBGA), flip chip lidded ball grid array (FCLGA) and flip chip pin grid array (FCPGA) packaging. As the next generation devices' requirements for power get even higher, enhanced thermal performance at the package level is increasingly important. A typical TIM applies a poly... » read more

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