Process Variation Analysis Of Device Performance Using Virtual Fabrication — Methodology Demonstrated On A CMOS 14-nm FinFET Vehicle


A new methodology is demonstrated to assess the impact of fabrication inherent process variability on 14-nm fin field effect transistor (FinFET) device performance. A model of a FinFET device was built using virtual device fabrication and testing. The model was subsequently calibrated on Design of Experiment corner case data that had been collected on a limited number of processed fab wafers. W... » read more

Servers And The Drive To DDR5


This IDC Technology Spotlight Study, sponsored by Rambus, discusses server demands on DRAM and different workloads. DRAM must dynamically adjust to the needs of these disparate workloads. The history of dynamic random-access memory (DRAM) is characterized by the ability of the technology to adapt to the increasingly specialized real-time memory requirements of the applications that utilize it. ... » read more

Condition Monitoring Of Drive Trains By Data Fusion Of Acoustic Emission And Vibration Sensors


Early damage detection and classification by condition monitoring systems is crucial to enable predictive maintenance of manufacturing systems and industrial facilities. The data analysis can be improved by applying machine learning algorithms and fusion of data from heterogenous sensors. This paper presents an approach for a step-wise integration of classifications gained from vibration and ac... » read more

Physics-Based Sensor Validation Via Ansys: Driving New Automotive Innovations


Autonomous driving is revolutionizing the global automotive industry. With every new model, cars are smarter and more capable of independently responding to external signals like lane markings, highway signs, other cars and pedestrians. However, formulating a correct response via artificial intelligence depends on flawless sensor performance. With so many sensors supporting the advanced driv... » read more

2.5D And 3D-IC Latch-Up Prevention


2.5D/3D ICs have evolved into an innovative solution for many design and integration situations, but they present unique verification obstacles that challenge electronic design automation (EDA) tools originally designed for 2D ICs. Automated solutions are needed not only to reduce verification cycles but also to improve the quality and reliability of package designs. Automated verification o... » read more

Radar Wave Propagation Through Materials


This white paper focuses on electromagnetic (EM) wave propagation through materials. For radar systems, this is of interest when radar must pass through walls, or when designing radomes (cover casings for the radar system). In the process of designing a radome, you should always perform full EM simulation. However, the content of this white paper will help you to first estimate whether a radome... » read more

Post-Quantum Cryptography


Quantum computing is increasingly seen as a threat to communications security: rapid progress towards realizing practical quantum computers has drawn attention to the long understood potential of such machines to break fundamentals of contemporary cryptographic infrastructure. While this potential is so far firmly theoretical, the cryptography community is preparing for this possibility by deve... » read more

10X Higher Productivity With VCS Dynamic Test Loading


The verification of a system-on-chip (SoC) is becoming increasingly complex, due to the multitude of functionality being implemented on a single chip. Different verification techniques are required at each level (IP, block, SoC and system) for faster verification closure. A successful verification strategy requires reuse of functional tests, faster test development and faster debug to improve t... » read more

Harness System-Level Data To Optimize Many-Core AI And ML Chips


The novel multicore architectures of SoCs for machine learning (ML) and artificial intelligence (AI) applications are expected to deliver huge improvements in power efficiency. However, chip development teams and the customers for their devices face the growing complexity of hardware-software co-optimization, validation, and debug. In short, these SoCs are increasingly difficult to validate and... » read more

Multi-Layer Deep Data Performance Monitoring And Optimization


Combining functional and parametric monitoring of the real-world behavior of complex SoCs provides a powerful new approach that facilitates performance optimization during development and in the field, improves security and safety, and enables predictive maintenance to prevent field failures. proteanTecs’ Universal Chip Telemetry (UCT) and Siemens’ Tessent Embedded Analytics are complementa... » read more

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