2.5D multi foundry chiplet solution; in-memory computation of CNN inferences with racetrack memory; high-performance p-type 2D FETs by nitric oxide doping; collusion threats in the IC supply chain; HW security verification; data-driven power modeling; stacking persistent embedded memories based on AOS transistors upon GPGPU platforms.
New technical papers recently added to Semiconductor Engineering’s library:
| Name of Paper | Research Organizations |
|---|---|
| System-Level Validation Across Multiple Platforms to build a 2.5D Multi Foundry Chiplet Solution | Intel Corporation |
| Hardware-software co-exploration with racetrack memory based in-memory computing for CNN inference in embedded systems | National University of Singapore, A*STAR, Chinese Academy of Sciences, and Hong Kong University of Science and Technology |
| High-performance p-type bilayer WSe2 field effect transistors by nitric oxide doping | Penn State University and Florida International University |
| Analyzing Collusion Threats in the Semiconductor Supply Chain | NIST and University of Maryland |
| FastPath: A Hybrid Approach for Efficient Hardware Security Verification |
RPTU Kaiserslautern-Landau and UC San Diego |
| Data-driven power modeling and monitoring via hardware performance counter tracking | ETH Zürich, Scuola Superiore Sant’Anna, RISE Research Institutes of Sweden and University of Bologna |
| CMOS+X: Stacking Persistent Embedded Memories based on Oxide Transistors upon GPGPU Platforms | Georgia Tech |
Find more semiconductor research papers here.
Leave a Reply