Chip Industry’s Technical Paper Roundup: Nov. 21
New papers: lithography modeling; solving Rowhammer; energy-efficient batch normalization HW; 3-to-1 reconfigurable analog signal modulation circuit; lateral double magnetic tunnel junction; reduce branch mispredictions in data centers; stabilizing hafnium oxide-based thin film; approximate adders for in-memory computing.
New technical papers added to Semiconductor Engineering’s library this week.
| Technical Paper |
Research Organizations |
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| Three-to-one analog signal modulation with a single back-bias-controlled reconfigurable transistor |
NaMLab gGmbH, GlobalFoundries, and TU Dresden |
| An Adversarial Active Sampling-based Data Augmentation Framework for Manufacturable Chip Design |
University of Texas at Austin, Nvidia, and the California Institute of Technology |
| Lateral double magnetic tunnel junction device with orthogonal polarizer for high-performance magnetoresistive memory |
Hanyang University |
| LightNorm: Area and Energy-Efficient Batch Normalization Hardware for On-Device DNN Training |
DGIST (Daegu Gyeongbuk Institute of Science and Technology) |
| Origin of Ferroelectric Phase Stabilization via the Clamping Effect in Ferroelectric Hafnium Zirconium Oxide Thin Films |
University of Virginia, Brown University, Sandia National Labs, and Oak Ridge National Lab |
| Whisper: Profile-Guided Branch Misprediction Elimination for Data Center Applications |
University of Michigan, ARM, University of California, Santa Cruz, and Texas A&M University |
| IMAGIN: Library of IMPLY and MAGIC NOR Based Approximate Adders for In-Memory Computing |
DFKI (German Research Center for Artificial Intelligence) and Indian Institute of Information Technology Guwahati |
| Fundamentally Understanding and Solving RowHammer |
ETH Zurich |
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Linda Christensen
(all posts)
Linda Christensen is vice president of operations and a contributing writer at Semiconductor Engineering.
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