Dangerous Electricity

Electricity to the modern age is as indispensible as air, but too much can be a bad thing for automotive and aerospace applications—especially when it is in the form of electrostatic discharge (ESD).

As chips advance to 28nm, 20nm and 16nm, the design window for electrostatic discharge is shrinking for a number of reasons, explained Norman Chang is vice president and senior product strategist at Apache Design.

“First, the Vdd supply of the chip is decreasing from, for example, 1.2 volts down to say, 1 volt, or 0.9 volt or 0.8 volt. The other factor is that the oxide breakdown voltage also decreases. Then, the device is also driving more current and power domains for today’s mobile applications,” he said.

Not to be confused with chip level ESD, which is addressed with HBM (human body model) testing and CDM (charged device model) testing, with system-level ESD, one of the problems is a soft error, which means that it’s not a hard failure for the system but it does need to be rebooted.

“For example, in a mobile phone with a soft error you will reboot it yourself—and that’s kind of annoying,” said Chang. “For a mobile phone, it’s okay, but for real-time systems, like an airplane or an automobile, the rebooting is not acceptable. That’s why in aerospace and automotive industries, if they have a soft error, they have to fix the problem.”

When designing a system including ESD protection, he continued, “you want to pay attention to the ‘gun letting’ scenario setup. For example, the gun zaps the connector, then the energy will propagate through the connector to the PCB traces. In between, maybe there is an ESD protection element. These energies will propagate through the protection elements through the PC board traces and at the end will be arriving at the pins of the IC. If the voltage of current is too big when the path arriving at a pin of the chip, if the ESD protection inside a chip is not enough, then you will either destroy the IC or will cause a system reboot.”

Further, at the chip level, all of the inter-domains (the areas between power domains) need ESD protection, and that increases the ESD elements and increases the complexity where you insert the ESD protection.

As such, the need for ESD protection will only increase with smaller geometries, so there is a clear need in the industry for these tools.

“ESD is a big issue because we’re jamming so many electronics into smaller and smaller spaces. Stuff that used to be an aerospace-only issue, where they deal with things like single event upsets (SEUs), are now becoming more prevalent in cars,” observed David Park, director of Solutions Marketing at Synopsys.

Other organizations looking at chip-level ESD include the University of Illinois at Urbana-Champaign, Texas Instruments, Tokyo Electronics Trading Co., Impulse Physics Laboratory, as well as a few European universities. Other EDA companies with activity in this area include Synopsys, Silicon Frontline, Cadence and Mentor Graphics, Chang added.

Related to ESD is electromagnetic interference (EMI), which recently caused a huge automobile recall by Toyota recall in early February. It appears that the airbag sensor chip was receiving EMI that made it believe an impact had occurred which deployed the bag. Toyota is dealing with the problem by adding an electronic filter around either the ECU or the chip itself.

Jeff Garrison, director of marketing, FPGA Implementation at Synopsys, noted that  electromagnetic radiation (EMI) in the atmosphere that can cause a change in state in electronic designs. “Once they get clocked into a design they’re called SEUs. These are kind of soft errors, meaning that it’s more of an error in the data, not the chip itself. It doesn’t hurt the chip but the data that’s going through the chip can get changed by this EM radiation and then that can get propagated through and cause a failure.”

Just as with ESD, in the past, he continued, “this was really only an issue for things going up into space and airplanes, where you’re up in altitude where there is a lot more EM radiation. But with the geometries of devices getting smaller this is a problem on the ground, as well. So in addition to military and aerospace customers, there’s also people that are doing high availability communications and networking, industrial control – anything involving human safety where they want to be able to mitigate the effects of these SEUs.”

The mil/aero industry has used techniques for years to handle SEUs manually, which involves a lot of replication. “There’s a technology called triple modular redundancy (TMR), where you triplicate your design and then you insert some voting logic at the end of the 3 outputs and you take the two out of three voting to get the right signal,” said Garrison. “That way if an SEU gets hit in one of the circuits, the chances of it getting hit in one of the others is really astronomically small.”

He noted that Synopsys has technology to automate that process so design teams can identify critical parts of the design that if something goes wrong could have bad effects, they can perform TMR on it to make sure an SEU can correct on the fly.

“The problem with TMR is it takes a lot of area. Obviously you are making your design three times as big, so normally you’re not going to do it for all of the design, unless you are going into space,” Garrison concluded.

At the end of the day, it appears the choices for automated tools is a bit slim at this time, representing an interesting area to watch develop.