Optimizing Hardware Faster

Silexica’s CEO talks about why high-level synthesis has become so important across different markets.


Maximillian Odendahl, CEO of Silexica, sat down with Semiconductor Engineering to talk about high-level synthesis and the changing role of this technology. What follows are excerpts of that conversation.

SE: What is the direction that high-level synthesis is heading in?

Odendahl: The direction hasn’t changed, but in the past HLS was not usable by the software guys. The main push right now is aerospace and defense and radar, and we are getting a lot of interest from the financial industry for things like low-latency trading. All of them have used FPGAs for a long time. So it’s not a new application, but they haven’t enabled their software guys to use HLS over the past 10 years even though they wanted to use it.

SE: In aerospace and defense, they’ve been working with single-core processors at older nodes. That’s changing.

Odendahl: And for a Kalman filter, that’s perfect for using as much parallelism as you can. That was always one of the best things about an FPGA. There is unlimited parallelism. So for beamforming for radar or LiDAR applications, that’s perfect.

SE: In the 1990s, quantitative analysts built some pretty sophisticated models for Wall Street firms, but they weren’t able to keep up with the daily changes. What’s different today?

Odendahl: There are new trading algorithms coming every day written in C/C++, but they can’t convert the algorithms to hardware fast enough. If you can use HLS and put it on an FPGA, that’s a huge competitive advantage. If you need a year to develop a chip, you miss the market because someone already came up with a better algorithm.

SE: So you’re creating a bridge between hardware and software, but don’t you still need expertise in both?

Odendahl: Yes, and this is why I don’t think we’ll ever replace the hardware guys. Maybe you provide an algorithm, or you provide 10 algorithms because you don’t know how it will work on the hardware. But if you can enable the software guy to provide the top 2 of those at 80% of the performance you need, the hardware guys can then work to get the last 20% or do the integration into the overall design. It’s a very different starting point than before.

SE: Can HLS provide some of the visibility of what generally is a black-box technology? If an algorithm goes awry, can HLS help shed light on that?

Odendahl: No, that has to come from the algorithm. HLS doesn’t make the hardware smarter or add a runtime component. It’s a compiler. It’s a productivity tool. Does that get any additional knowledge? No. If you want more knowledge, though, you have to code that in C/C++.

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