Outlook: DRAM, NAND, Next-Gen Memory

Jim Handy, director at Objective Analysis, sat down with Semiconductor Engineering to talk about the 3D NAND, DRAM and next-generation memory markets. What follows are excerpts of that discussion.

SE: How would you characterize the NAND market thus far in 2021?

Handy: All chips are seeing unusual strength in 2021, but NAND flash and DRAM are doing what they usually do by exhibiting more extreme swings than other types of chips. It looks like the year will close out at around $60 billion for NAND. Prices rose through the year until August, when they settled back down, growing 14% on the spot market to 7.5 cents per GB, only to fall back to 6.7 cents, down 10%, by November. In other words, there was no big price swing. This stability allowed SK Hynix to regain profitability in this market, which had been a challenge for the company since the 2018 price fall. In 2022, assuming that today’s unusually high level of demand continues, prices should remain stable, and the steady 40%+ of GB growth indicate that revenues could increase by a similar amount. If demand softens and prices fall, they are unlikely to fall significantly, which means that there should still be solid growth.

SE: What do you see for NAND in Q4 of 2021 and 2022?

Handy: End markets are still remarkably robust, so we’re expecting for NAND revenues in the fourth quarter to come in at about $15 billion. The first quarter should improve upon that. Part of the strength in the first quarter is from the fact that seasonality has changed with the improving wealth of China’s consumers, who generally do their gift giving in February for the lunar new year.

SE: What about the ”layer race” in 3D NAND? Micron and SK Hynix have announced 176-layer 3D NAND. What do you expect to see in 2022? More layers or a slowdown?

Handy: What is interesting to me is that the cadence of layer increases changed relatively suddenly. It used to be on an annual rhythm of 1x, 1.5x, 2x, 3x and so on. Every other year, a new layer count came out that had twice as many layers as the one that was introduced two years earlier; in the intervening years, a half-density came out that had twice as many layers as the last half step. Recently, NAND makers have set their sights differently and said: ‘What will provide us with the optimum cost structure?’ In one case, it’s 112 layers like WDC and Kioxia, and in another, it’s 176 layers like Micron and SK Hynix. I fully expect for the layer race to continue, since that’s the most straightforward way to reduce costs, but I don’t think that next year’s new layer counts are anything that I can predict. Someone may even ship a part with an odd number of layers.

SE: Any other comments on 3D NAND?

Handy: YMTC is diligently working to improve its yields, but that’s really hard with a ‘go it alone’ approach like theirs. Back in 2018, I predicted that they would change that strategy and partner with an established vendor, but they haven’t taken that path yet. I don’t see anyone else entering the market anytime soon. Unlike a lot of other people, I don’t see SK Hynix’s acquisition of the Intel NAND business as a part of a natural consolidation. There’s no underlying economic reason for the NAND market to consolidate, as there was with DRAM, or like the mechanism that drove the semiconductor industry’s widespread adoption of the foundry model for CMOS logic. The NAND market is experiencing revenue growth that could sustain more vendors than it already has. I would be unsurprised to see an additional vendor enter the market over the next five years. I’m unconvinced by the rumors that WDC wants to acquire Kioxia. The current relationship is highly beneficial to WDC as it now stands. Acquiring Kioxia would dilute that.

SE: How would you characterize the DRAM market thus far in 2021?

Handy: DRAM is doing very well. Some folks point to the fact that spot market prices have been declining since mid-year, but they are ignoring the fact that they are coming off a peak, since prices had a big run-up from September 2019 to April 2021, rising 75% to $4.35/GB. Now, they’re back down at $3.30, but that’s still 33% above the 2019 low point. There’s not a big glut, and we don’t see the kind of inventory build-up that caused 2019’s price collapse. So, as long as demand maintains its current course, it’s reasonable to expect the market to be flat to a little up next year. Our expectation for 2021 is for DRAM revenues to reach $86 billion. The entire chip market didn’t reach that size until 1994.

SE: What do you expect in 2022?

Handy: As with NAND, the DRAM market should do well if demand maintains its current course. Contract ASPs have been doing very well this year, and as long as they stabilize at their current level, the market’s revenue growth could approach its bit growth of about 20%. On the downside, though, there are good margins being made today, and at least one vendor has expressed plans for their output to grow at a faster rate than demand, which could result in an oversupply and softening prices. The good margins provide plenty of room for a big drop if things go wrong. This would be especially true if demand softens from its current level, which is unusually high.

SE: Where are we in emerging memories?

Handy: Tom Coughlin and I annually update our report on emerging memories, and this year’s edition has been more popular than those of prior years. It’s an interesting field. The big story in this report is always Intel’s Optane memory, also known as 3D XPoint. If Intel continues to support it, and if it gains modest acceptance (both of these play off each other), then we predict that it could grow to nearly $30 billion by 2031.

SE: What about STT-MRAM?

Handy: We see MRAM, or possibly another competing technology, growing to about $4 billion by 2031, mainly based on its use as the embedded memory in SoCs. Although MRAM today has the lead over other SoC emerging memory technologies, it’s still too early to tell if this market might fall to another technology. There are certainly lots of contenders, and we believe that we have evaluated all of them. The big driver for this is the problem with NOR flash and, to a lesser degree, with SRAM. NOR hits a scaling limit at 28nm, since nobody’s developed a way to make a finFET-based NOR cell. If you need an NVM at sub-28nm processes, then it has to be something else. The problem with SRAM is a little different: SRAM doesn’t scale linearly with the process. This means that a microprocessor that’s 50% SRAM at 28nm might be 65% SRAM at 14nm and maybe 80% SRAM at 10nm, and the die size won’t shrink by all that much, making the chip more costly than desired. This will drive SRAM to eventually be replaced as well. When that happens, it will make caches, and eventually registers, persistent, and whole new ways of computing and software design will be the result. This should be very positive for power consumption.