Disaggregation and the wind-down of Moore’s Law have changed everything.
It depends on whom you ask, but there are advantages to both.
Research shows significant improvement in time to market and optimization of key metrics.
Efficiency is improving significantly, but the amount of data is growing faster.
Some designs focus on power, while others focus on sustainable performance, cost, or flexibility. But choosing the best option for an application based on benchmarks is becoming more difficult.
The clock network is complex, critical to performance, but often it’s treated as an afterthought. Getting this wrong can ruin your chip.
Moving forward will require a fundamental reconsideration of logic.
After years of research, chipmakers have started combining ultra low-power designs with advancements in harvesting technology.