tag: IP

New Risk Factors For SoCs
By Ed Sperling - 12 Sep, 2013 - Comments: 0

By Ed Sperling Third-party IP is becoming increasingly important in SoC designs. It saves development time and adds unique value. It also can improve performance and lower power, because a company specializing in IP frequently can build and optimize it better than a company that builds entire chips. But there are also plenty of landmines in IP integration, and there is a growing concern abo... » read more

Experts At The Table: Who Takes Responsibility?
By Ed Sperling - 12 Sep, 2013 - Comments: 0

By Ed Sperling Semiconductor Engineering sat down with John Koeter, vice president of marketing and AEs for IP and systems at Synopsys; Mike Stellfox, technical leader of the verification solutions architecture team at Cadence; Laurent Moll, CTO at Arteris; Gino Skulick, vice president and general manager of the SDMS business unit at eSilicon; Mike Gianfagna, vice president of corporate market... » read more

DDR White Paper
By Various Writers - 12 Sep, 2013 - Comments: 0

DDR DRAM memory controllers have many competing demands on them. A good memory controller must improve the bandwidth of the memory interface while respecting the latency demands of the CPU, graphics, and real-time DRAM in the system while maintaining compliance with memory bus and on-chip bus standards. The read reorder buffer (RRB) is a silicon-proven architectural enhancement available in... » read more

The Single Platform Strategy
By Kurt Shuler - 22 Aug, 2013 - Comments: 0

By Kurt Shuler For semiconductor companies in high-volume or emerging growth markets, the days of using multiple platforms to address different segments are over. The new era of using a single platform to address several different segments is rapidly taking hold. Adding fuel to this transition is the greater flexibility that design teams have to spin derivatives of those single platforms. T... » read more

Blog Review: Aug. 21
By Ed Sperling - 21 Aug, 2013 - Comments: 0

By Ed Sperling Mentor’s Michael Ford recalls the worst meetings in the world—ones that involve materials in the manufacturing process. Unfortunately there were a lot of them, so they were more like working in a recurring nightmare. Paging Freddie Krueger. Synopsys’ Karen Bartleson talks with Angisys CEO Anupam Bakshi about why EDA companies need to collaborate, and what’s the risk ... » read more

Experts At The Table: Low-Power Verification
By Ed Sperling - 16 Aug, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance Engineering sat down to discuss power format changes with Sushma Hoonavera-Prasad, design engineer in Broadcom’s mobile platform group; John Biggs, consultant engineer for R&D and co-founder of ARM; Erich Marschner, product marketing manager at Mentor Graphics; Qi Wang, technical marketing group director at Cadence; and Jeffrey Lee, corporate ap... » read more

Why Does That App Make My Phone Hot?
By Adam Sherer - 08 Aug, 2013 - Comments: 0

By Adam Sherer Popular Mechanics examined this topic in 2011, focusing mostly on packaging and other physical conditions. “Poor signal, intense workload and battery charging” were quoted, but the verification engineer knows the part of that list that was glossed over—intense workload. The author of that article waved away that aspect, saying the operating system usually can handle the so... » read more

Mixing Custom And Standard Parts
By Ed Sperling - 08 Aug, 2013 - Comments: 0

By Ed Sperling The amount of third-party and re-used IP content in an SoC is on the rise, but once a decision to buy vs. make has been made it doesn’t always stay that way. In fact, chipmakers are swinging the pendulum back and forth across a variety of chips, building IP themselves, standardizing on another vendor’s IP, then sometimes rolling it back the other way. The reasons are usua... » read more

The Rise Of Semiconductor IP Subsystems
By Various Writers - 06 Aug, 2013 - Comments: 0

The semiconductor IP (SIP) market arose when SIP vendors created IP functions that mirrored those found in the discrete semiconductor market and made those functions available to SoC designers in the form of hard or soft SIP blocks. As the SoC and SIP markets evolved, it was a natural evolution that many discrete SIP functions be converged into larger blocks that mimic system-level functions (i... » read more

Experts At The Table: Performance Analysis
By Ed Sperling - 02 Aug, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance Engineering sat down with Ravi Kalyanaraman, senior verification manager for the digital entertainment business unit at Marvell; William Orme, strategic marketing manager for ARM’s System IP and Processor Division; Steve Brown, product marketing and business development director for the systems and software group at Cadence; Johannes Stahl director o... » read more

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