tag: lithography

Comparative Stochastic Process Variation Bands For N7, N5, And N3 At EUV
By KLA - 21 Feb, 2019 - Comments: 0

By Alessandro Vaglio Preta, Trey Gravesa, David Blankenshipa, Kunlun Baib, Stewart Robertsona, Peter De Bisschopc, John J. Biaforea a) KLA-Tencor Corporation, Austin, TX 78759, U.S.A. b) KLA-Tencor Corporation, Milpitas, CA 95035, U.S.A. c) IMEC, Kapeldreef 75, 3000, BE ABSTRACT Stochastics effects are the ultimate limiter of optical lithography technology and are a major concern for n... » read more

Lithography Challenges For Fan-out
By Mark LaPedus - 12 Feb, 2019 - Comments: 3

Higher density fan-out packages are moving toward more complex structures with finer routing layers, all of which requires more capable lithography equipment and other tools. The latest high-density fan-out packages are migrating toward the 1µm line/space barrier and beyond, which is considered a milestone in the industry. At these critical dimensions (CDs), fan-outs will provide better per... » read more

Manufacturing Bits: Feb. 5
By Mark LaPedus - 05 Feb, 2019 - Comments: 1

Multi-beam litho shakeout The multi-beam e-beam market for lithography applications continues to undergo a shakeout amid technical roadblocks and other issues. Last week, ASML announced that it had acquired the intellectual-property (IP) assets of Mapper Lithography, a Dutch supplier of multi-beam e-beam tools for lithography applications that fell into bankruptcy late last year. As it t... » read more

EUV Mask Blank Battle Brewing
By Mark LaPedus - 15 Nov, 2018 - Comments: 2

Amid the ramp of extreme ultraviolet (EUV) lithography in the market, suppliers of EUV mask blanks are expanding their production. And a new player—Applied Materials—is looking to enter the market. AGC and Hoya, the two main suppliers of EUV mask blanks, are adding capacity for these critical components that are used for EUV photomasks. A mask blank serves as the substrate for a photomas... » read more

Using DSA With EUV
By Ed Sperling - 05 Nov, 2018 - Comments: 1

James Lamb, deputy CTO for advanced semiconductor manufacturing and corporate technical fellow at Brewer Science, looks at how directed self-assembly can be used to supplement EUV at advanced nodes. https://youtu.be/PItF4egHOxc     See other tech talk videos here » read more

EUV’s Uncertain Future
By Ed Sperling - 18 Oct, 2018 - Comments: 8

The ground appears to be solidifying under EUV. Intel announced this week it is reducing its stake in ASML to less than 3%, the second such move in a year. Apparently ASML no longer needs outside help. According to the company's earnings report, ASML turned in net sales of €2.776 billion, a slight increase over the €2.447 billion (GAAP) the company reported in Q3 and way up over the €... » read more

Variation At 10/7nm
By Ed Sperling - 18 Oct, 2018 - Comments: 1

Klaus Schuegraf, vice president of new products and solutions at PDF Solutions, explains why variability is a growing challenge at advanced nodes, why middle of line is now one of the big problem areas, and what happens when a via is misaligned due to a small process variation. https://youtu.be/jQfggOnxZJQ » read more

Variation’s Long, Twisty Tail Worsens At 7/5nm
By Ed Sperling - 20 Sep, 2018 - Comments: 1

Variation is becoming a bigger challenge at each new node, but not just for obvious reasons and not always from the usual sources. Nevertheless, dealing with these issues takes additional time and resources, and it can affect the performance and reliability of those chips throughout their lifetimes. At a high level, variation historically was viewed as a mismatch between what design teams in... » read more

What Else Is In A Node?
By Sundeep Bajikar - 21 Jun, 2018 - Comments: 0

In part one of this blog, I reported on the 2018 Industry Strategy Symposium (ISS) where Dan Hutcheson of VLSI Research led a panel with representatives of Synopsys, NVIDIA, Intel, ASML and Applied Materials. The participants discussed how the industry is focused on simultaneously squeezing more capabilities from leading-nodes, inter-nodes and trailing-nodes to drive advances in computing. I to... » read more

Chip Dis-Integration
By Brian Bailey - 14 Jun, 2018 - Comments: 2

Just because something can be done does not always mean that it should be done. One segment of the semiconductor industry is learning the hard way that continued chip integration has a significant downside. At the same time, another another group has just started to see the benefits of consolidating functionality onto a single substrate. Companies that have been following Moore's Law and hav... » read more

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