Chip Industry Technical Paper Roundup: Mar. 5


New technical papers added to Semiconductor Engineering’s library this week. [table id=201 /] » read more

Impact of Scaling and BEOL Technology Solutions At The 7nm Node On MRAM


A technical paper titled “Impact of Technology Scaling and Back-End-of-the-Line Technology Solutions on Magnetic Random-Access Memories” was published by researchers at Georgia Institute of Technology. Abstract: "While magnetic random-access memories (MRAMs) are promising because of their nonvolatility, relatively fast speeds, and high endurance, there are major challenges in adopting the... » read more

Chip Industry Technical Paper Roundup: Feb. 6


New technical papers added to Semiconductor Engineering’s library this week. [table id=187 /] More ReadingTechnical Paper Library home » read more

HW/SW Techniques To Regulate Supply Voltage And Clock Frequency Of Intermittently-Computing Devices


A technical paper titled “Dynamic Voltage and Frequency Scaling for Intermittent Computing” was published by researchers at Politecnico di Milano, Georgia Institute of Technology, Lahore University of Management Sciences, and Uppsala University. Abstract: "We present hardware/software techniques to intelligently regulate supply voltage and clock frequency of intermittently-computing devic... » read more

Research Bits: Jan. 8


High mobility graphene Researchers at the Georgia Institute of Technology and Tianjin University created a functional semiconductor made from graphene that is compatible with conventional microelectronics processing methods. "We now have an extremely robust graphene semiconductor with 10 times the mobility of silicon, and which also has unique properties not available in silicon," said Walt... » read more

Research Bits: Dec. 18


Stacking 2D layers for AI processing Researchers from Washington University in St. Louis, MIT, Yonsei University, Inha University, Georgia Institute of Technology, and the University of Notre Dame demonstrated monolithic 3D integration of layered 2D material, creating a novel AI processing hardware that integrates sensing, signal processing, and AI computing functions into a single chip. Th... » read more

Chip Industry’s Technical Paper Roundup: October 24


New technical papers added to Semiconductor Engineering’s library this week. [table id=157 /] More Reading Technical Paper Library home » read more

Scalable And Compact Multi-Bit CAM Designs Using FeFETs


A technical paper titled “SEE-MCAM: Scalable Multi-bit FeFET Content Addressable Memories for Energy Efficient Associative Search” was published by researchers at Zhejiang University, China, Georgia Institute of Technology, University of California Irvine, Rochester Institute of Technology, University of Notre Dame, and Laboratory of Collaborative Sensing and Autonomous Unmanned Systems of ... » read more

Chip Industry’s Technical Paper Roundup: October 3


New technical papers recently added to Semiconductor Engineering’s library: [table id=150 /] Related Reading Technical Paper Library home » read more

LLM-Aided AI Accelerator Design Automation (Georgia Tech)


A technical paper titled “GPT4AIGChip: Towards Next-Generation AI Accelerator Design Automation via Large Language Models” was published by researchers at Georgia Institute of Technology. Abstract: "The remarkable capabilities and intricate nature of Artificial Intelligence (AI) have dramatically escalated the imperative for specialized AI accelerators. Nonetheless, designing these accele... » read more

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