HW accelerators; simulation & verification; DRAM TRNG; hyperdimensional computing; organic bipolar transistors; level 2-5 crashes; novel semiconductors; quantum battery & charging
New technical papers added to Semiconductor Engineering’s library this week.
| Technical Paper | Research Organizations |
|---|---|
| Data-Driven Offline Optimization For Architecting Hardware Accelerators | Google Research and UC Berkeley |
| Coverage-Directed Test Selection Method For Automatic Test Biasing During Simulation-Based Verification | University of Bristol and Infineon Technologies |
| DR-STRaNGe: End-to-End System Design for DRAM-based True Random Number Generators |
TOBB University of Economics and Technology and ETH Zurich |
| Wireless On-Chip Communications for Scalable In-memory Hyperdimensional Computing | IBM Research, Zurich Switzerland and Universitat Politecnica de Catalunya |
| Organic bipolar transistors | Technische Universität Dresden, NanoP, Technische Hochschule Mittelhessen, University of Applied Science, and ALBA Synchrotron |
| National Highway Traffic Safety Administration Reports On Levels 2-5 | U.S. National Highway Traffic Safety Administration (NHTSA) |
| Semiconducting silicon–phosphorus frameworks for caging exotic polycations (novel family of semiconductors) | Iowa State University, and Ames Laboratory, U.S. Department of Energy |
| Superabsorption in an organic microcavity: Toward a quantum battery |
University of Adelaide (Australia), University of Sheffield (UK), Politecnico di Milano (Italy), University of St Andrews (UK), and Heriot-Watt University |
| Quantum Charging Advantage Cannot Be Extensive Without Global Operations | Institute for Basic Science (IBS) and Seoul National University |
Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us posting links to papers.
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