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Week In Review: Design, Low Power

EDA-as-a-Service; edge inference board; Zoned Storage; quantum component acquisition.


Synopsys introduced a new model for using its EDA tools on the cloud. Synopsys Cloud provides pay-as-you-go access to the company’s cloud-optimized design and verification products, with pre-optimized infrastructure on Microsoft Azure to address higher levels of interdependencies in chip development. “As more design flows incorporate AI, requiring even more resources, the virtually unlimited compute and EDA access we’re providing will lay the foundation for new levels of semiconductor innovation while delivering a flexible, secure chip development environment for future demands,” said Sassine Ghazi, president and chief operating officer at Synopsys. To support this, Synopsys is working with major foundries to provide customers with a flexible, cloud-optimized approach for accessing and managing foundry collateral.

M31 Technology utilized Cadence’s CloudBurst platform in conjunction with Cadence’s Liberate Trio Characterization Suite infrastructure when designing its advanced-node silicon IP. M31 noted that the platform reduced setup time by 25X and sped up overall time to market by 5X.

Semiconductor incubator Silicon Catalyst added five new companies to its In-Kind Partner program: 360Work, CentralApp, Cliosoft, HDL Design House, and InteliSpark. The program aims to lower capital expenses by giving startups in the Silicon Catalyst Incubator access to tools and services including including design tools, simulation software, design services, foundry PDK access and MPW runs, test program development, tester access, along with banking and legal services. “We are very pleased to join Silicon Catalyst as an In-Kind Partner to provide design data and IP management solutions to their incubator companies. Setting up engineering best practices early is imperative to any startup’s success. Design and IP management solutions are the foundations of these practices,” said Srinath Anantharaman, CEO at Cliosoft.

Samsung Foundry adopted an advanced voltage-timing signoff solution developed by Synopsys and Ansys. Samsung Foundry reported high silicon correlation using the integrated solution. “Dynamic voltage-drop and power integrity are significant challenges for energy efficient design,” said Sangyun Kim, vice president of Design Technology at Samsung Foundry. “The new Synopsys-Ansys voltage-timing solution shows good correlation with silicon and is especially effective in accurately estimating DVD impact on bus-pipeline paths. Samsung Foundry plans to deploy the solution on production designs at advanced nodes to prevent failures in silicon and maximize design energy efficiency.”

Faraday Technology uncorked a new SoC development platform. Implemented in Samsung Foundry’s 14LPP FinFET process, the SoCreative!VI A600 SoC platform includes Faraday’s A600 SoC chip on an evaluation board and Linux SDK to create a full-performance system environment for functional verification and system software development in the early development stage.

Aldec updated its Active-HDL software with support for VHDL-2019 protected types with generics, composites of protected types, pointers to objects of protected types and composition with protected types.

Segger updated its Embedded Studio for Arm Version 6 with real-time memory management, which improves efficiency and response time for allocating and freeing up memory, enabling hard real-time to applications written in C++.

eTopus Technology debuted its 7/6nm multi-protocol SerDes IP optimized for PCIe Gen 1 to 6. The new IP also supports Ethernet standards from 1G to 112G with support for long reach applications. The SerDes can support a wide range of channels from Short Reach (10dB) to Long Reach (up to 42dB) with low power of 6pj/bit.

Alma Technologies uncorked DSC 1.2b encoder and decoder IP cores that enable the transport of high-definition content with up to 10K resolution, 120Hz refresh rate, high dynamic range, and high color depth through existing interfaces, such as VESA DisplayPort, MIPI DSI, and HDMI 2.1.

AI hardware
Flex Logix announced availability of its InferX X1M boards. The boards use the InferX X1 edge inference accelerator in an M.2 form factor and are optimized for large models and megapixel images at batch=1 for high-performance, low-power object detection and other high-resolution image processing capabilities needed for edge servers and industrial vision systems. A suite of software includes tools to port trained ONNX models to run on the X1M, a simple runtime framework to support inference processing within both Linux and Windows, and an InferX X1 driver with external and internal APIs.

Cognifiber announced development of a glass-based photonic chip. Aiming to replace silicon, the company says the chips are capable of reducing data center rack-size systems to a 4U server (~18cm high) for deployment in edge environments. “The downsizing potential using glass-based photonic chips in conjunction with our proprietary fibers promises to bring superb-performance servers to the edge, removing many existing bottlenecks while dramatically reducing power consumption,” said Eyal Cohen, co-founder & CEO of Cognifiber. “Anything that generates vast amounts of data every second, such as connected vehicles, automated trains, or fleet management of large shipment drones can respond in real-time to events without reliance on data centers.” Cognifiber also makes in-fiber processing technology that enables signals to be processed while still in a fiber-optic cable.

IBM Research released an open-source toolkit for analog AI simulation that simulates analog NVM crossbar arrays and allows estimation of the impact analog devices’ non-idealities might have on the accuracy of deep neural networks (DNN). The IBM Analog Hardware Acceleration Kit supports both inference and training as well as hardware-aware-training, mixed-precision training, and advanced analog training optimizers.

VTT Technical Research Centre of Finland selected Keysight Open Radio Architect (KORA) solutions to build an open testing and integration facility in support of an open radio access network (RAN) ecosystem. “Partnering with Keysight will enable VTT to create a unique test and integration facility recognized by the O-RAN ALLIANCE. This will advance the development of a technology built on open interfaces, while supporting strong collaboration between vendors, test labs and mobile operators,” said Sauli Eloranta, vice president, Safe and Connected Society at VTT.

Analog Devices introduced a millimeter wave (mmW) 5G front-end chipset that includes four highly integrated ICs and provides a complete solution to reduce the number of components needed for 24 to 47GHz 5G radios. The new chipset comprises two single channel (1T1R) up/downconverters (UDCs) and two dual polarization 16-channel beamformer devices on an advanced CMOS process. The chipset also enables operation of phased array calibration functions online in the field in addition to factory NVM.

Power devices
Infineon launched a complete power management offering for compute servers based on Intel’s Sapphire Rapids CPU. The “pick-and-place” solution utilizes several Infineon power management devices and technologies that deliver optimum power efficiency and performance, including XDP digital multiphase controllers, OptiMOS integrated power stages, and OptiMOS IPOL voltage regulator.

Nowi introduced a new energy harvesting PMIC. Available in a 4mmx4mm size, Diatom has a wide power input range from microwatts to milliwatts and ultra-fast maximum power point tracking (MPPT). It can extract the power output of a wide range of energy harvesters to charge a variety of energy storage elements such as rechargeable batteries or supercapacitors. It targets applications such as smart home, industrial/retail IoT, and wearables.

Samsung Electronics and Western Digital will collaborate to standardize and drive adoption of next-generation data placement, processing, and fabrics (D2PF) storage technologies. The companies will initially focus on creating an ecosystem for Zoned Storage solutions. They have formed the Zoned Storage Technical Work Group to define and specify common use cases for Zoned Storage devices, as well as host/device architecture and programming models. Eventually, they plan to expand to zone-based device interfaces such as Zoned Namespaces (ZNS) SSDs and Shingled Magnetic Recording (SMR) HDDs, as well as future-generation, high-capacity storage devices with enhanced data placement and processing technologies. At a later stage, these initiatives will be expanded to include other emerging D2PF technologies such as computational storage and storage fabrics including NVMe over Fabrics (NVMe-oF).

Kioxia began sampling new Automotive Universal Flash Storage (UFS) Ver. 3.1 embedded flash memory devices. The new lineup utilizes Kioxia BiCS FLASH 3D flash memory and is available in capacities from 64GB to 512GB to support the various automotive applications. The new devices support a wide temperature range (-40°C to +105°C), meet AEC4-Q100 Grade2 requirements, and offer enhanced reliability capabilities.

Quantum computing
Quantum Machines, a provider of control and operation systems for quantum computing, will acquire QDevil, a provider of auxiliary electronics and specialized components for quantum computers. QDevil’s products include a cryogenic filter, a 24-channel ultra-stable low noise DAC, a fast-exchange chip carrier system, and a 24-channel breakout box. “We’re very excited to add the QDevil team to the Quantum Machines family,” said Itamar Sivan, co-founder and CEO of Quantum Machines. “The addition of their unique expertise in auxiliary electronics and quantum hardware is a natural fit with our team, and will help us continue to accelerate the realization of useful quantum computers that are disruptive and ubiquitous across all industries.”

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