Synopsys’ full stack AI-driven design suite; Renesas RISC-V voice-control ASSP; Amkor puts silicon carbide in automotive packaging.
Synopsys rolled out an AI-driven design suite called Synopsys.ai at the Synopsys User Group conference this week, which it says reduces time to better results at multiple points in the design flow. The company noted the new technology uses reinforcement learning, which compensates for relatively small data sets by allowing engineers to interact with that data more easily at any point, and to change direction more quickly.
Gordon Moore, one of the founders of Fairchild Semiconductor and Intel — and author of the paper that first predicted the doubling of transistor density every couple years, which came to be known as Moore’s Law — died at age 94 at his home in Hawaii on Friday, March 24, 2023.
The industry is understanding more about how aging affects reliability, but more variables make it harder to fix. Uneven circuit aging is becoming a bigger problem.
Renesas added a RISC-V MCU for voice-controlled HMI (human-machine interface) systems to its portfolio. The new R9A06G150 32-bit ASSP is a production-ready voice-control system chip for residential and commercial building automation, home appliances, toys and healthcare devices. The chip is pre-programmed. Renesas already has experience with RISC-V, including a 32-bit motor-control ASSP and 64-bit general-purpose RZ/Five MPUs based on a 64-bit RISC-V CPU released last year.
Daimler Truck and Siemens Digital Industries Software are working on an engineering design platform for trucks and buses that will offer lifecycle management. Using components of Siemens’ Xcelerator portfolio, Daimler Truck’s goal is to develop trucks and buses that will be powered by electric battery and hydrogen-based drives, with digital intelligence added.
Cerebras, maker of the largest processor — the Wafer-Scale Engine (WSE) — has ‘open sourced’ seven of its GPT-3 models, with from 111 million to 13 billion parameters. The generative pre-trained transformer (GPT) models were trained using the Chinchilla formula and released via the Apache 2.0 license. “The latest large language model [LLM] – OpenAI’s GPT4 – was released with no information on its model architecture, training data, training hardware, or hyperparameters. Companies are increasingly building large models using closed datasets and offering model outputs only via API access,” according to Cerebras’ announcement. “For LLMs to be an open and accessible technology, we believe it’s important to have access to state-of-the-art models that are open, reproducible, and royalty free for both research and commercial applications. To that end, we have trained a family of transformer models using the latest techniques and open datasets that we call Cerebras-GPT.”
Enfabrica emerged from stealth mode with its first chip, the Accelerated Compute Fabric Switch (ACF-S). The chip enables switching and bridging between heterogeneous compute and memory resources in a single silicon die using standards-based interfaces including multi-port 800 Gigabit Ethernet networking and high-radix PCIe Gen5 and CXL 2.0+. It combines CXL.mem disaggregation, performance/capacity layering, and remote direct memory access (RDMA) networking to implement a high-bandwidth, high-capacity, latency bound memory hierarchy for large-scale AI compute, which the startup claims reduce the number of GPUs and CPUs needed. Founded in 2020, it is based in Mountain View, California, USA.
RISC-V designs can be verified by using a golden reference model as a comparison, but players in the RISC-V may be too creatively undisciplined for that. Is RISC-V a complete nightmare because there are so many options? Read what the experts say. Also learn what makes RISC-V verification unique.
A new conference devoted to memory called MemCon 2023 was held this month in Silicon Valley at the Computer History Museum. Samsung Semiconductor is among the founding members. For engineers and architects working on memory-constrained problems, the conference looks at genomics, AIML, datacenter, HPC, computational fluid dynamics, in-memory databases, and enterprise knowledge graphs for memory-bound problems.
Winbond is working with STMicroelectronics’ Partner Program to integrate Winbond’s specialty memory ICs with ST’s STM32 microcontrollers (MCUs) and microprocessors (MPUs). Winbond’s HYPERRAM is already supporting the memory buffer of ST’s new STM32U5 ultra-low-power MCU (based on the advanced Cortex-M33 core). This latest agreement focuses on combining Winbond’s DDR3 dynamic RAM with ST’s STM32MP1 series MPUs.
Amkor Technology is now using silicon carbide in automotive power packaging, and says its investments will make it possible for its customers to expand silicon carbide production rapidly and cost effectively.
Working with Fraunhofer IIS, the German city of Nuremberg published results of their study on the viability of the hydrogen economy in the region.
Researchers from the Vienna University of Technology (TU Wien) say they have invented an oxygen-ion-battery using ceramic materials. The rechargeable battery’s storage capacity does not diminish over time but it’s not for high-energy-density applications. Read more in this week’s Research Bits.
The U.S. Department of Energy and Stellantis are hosting the Battery Workforce Challenge (BattChallenge), a three-year competition for universities and vocational partners, such as community colleges, trades, and apprenticeship programs, to design, build, test, and integrate an advanced EV battery into a Stellantis vehicle.
SEMI summarized the latest CHIPS Program Office release of materials for pre-applications and full applications for funding.
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