Complexity and industry consolidation are fueling unprecedented demand for expertise.
Semiconductor service revenues have been growing for the past year, fueled by complex thermal and power issues at advanced nodes, the difficulty of integrating more and more IP blocks, and far more techniques, languages and methodologies that engineers need to learn to be productive in the finFET generation.
The services business typically acts as a bridge between down and up cycles in the chip business, but there are some unusual elements showing up in the current cycle:
• Changes are occurring so quickly at the leading edge of Moore’s Law that there simply are not enough engineers being trained in enough areas to handle all the changes internally.
• Consolidation is occurring at a rapid pace while R&D budgets are remaining flat as a percentage of combined revenue. That’s forcing companies to focus on core competencies and outsource an increasing amount of IP and chip development that they don’t fully understand how to optimize rather than building up the skill sets internally.
• Even where there is money to hire talent, notably the Internet of Things and IIoT, there is not enough supply to meet demand. That gap is being filled, at least in the short term, by contractors.
These trends are playing out across the entire semiconductor ecosystem. There is an uptick in services from the front end of design all the way through to manufacturing equipment companies. And while there is a heavy recruitment effort underway for full-time employees with advanced and new skills, hardware companies are in competition with software and social media companies.
“Services tend to be a buffer,” said Wally Rhines, chairman and CEO of Mentor Graphics. “You want stability in the workforce and you modulate demand with services. Then, as the market takes off, you get R&D back in line and figure out when you’re really in recovery, and then add permanent jobs. But there are a lot of new things being thrown at designers these days that require a lot of learning. They need to learn SystemVerilog for UVM. They need to know 14nm and 10nm design rules, which include coloring, multiprocessing and finFET power analysis. Those are all new skills, and they’re unavailable in the labor market. We’re in an unprecedented period of learning.”
That steep learning curve is expected to continue for some time, too, with each new node much more difficult than the last, and the IoT pushing up demand for custom designs that are ultra low power and at least partially customized. That will drive the creation of new companies, and those new companies have very limited expertise in house. As Aglaia Kong, CTO for the IOE solution at Cisco, noted: “About 50% of the IoT devices in three to four years will be made by companies that don’t exist today.”
This is particularly true in places like China, where there is very limited expertise. In fact, ARM just cemented a deal this week with Beijing-based Thundersoft for an “IoT Ecosystem Accelerator” in China. Thundersoft’s chairman, Hongfei Zhao, said in a statement, “The challenges that startups are facing include the lack of complete product experience, resources, and ecosystem support.”
That observation isn’t unique. “We’re seeing companies in China without six generations of products they can fall back on, and we’re seeing systems companies now looking at doing 3D depth of field analysis,” said Steve Roddy, senior group director of the Tensilica business unit at Cadence. “So we can sell them a DSP, but when they look at the system and performance, what does streaming analysis look like when you go into MIPI and then into a DSP? It’s a complex situational analysis involving interactions. If this is the seventh generation of a platform, you already have some grounding because this is what you did last time. But even those guys are asking a lot of questions. And if it’s your first or second piece of silicon, you’re going to need help.”
Scale matters, but not always in predictable ways
They’re not the only ones who need help. At advanced nodes, doing one or two chips a year using a particular foundry process isn’t enough to build up the necessary level of expertise for developing extremely complex SoCs.
“There are a couple of factors at play here,” said Mike Gianfagna, vice president of marketing at eSilicon. “If a company can outsource what they do once or twice a year, that’s much more efficient than doing it themselves. We haven’t seen that happening much in design services, but we are seeing it in manufacturing services. Companies are outsourcing their existing production and questioning whether they really do need to maintain a team to source parts. You can’t convince people to change workflow with an argument or even a value proposition, though. They’ll only do it when they’re forced to, which happens when they need to decrease operating expenses. The second piece is that designs are getting harder and harder and the cycles of learning are collapsing. We’re seeing more and more opportunities for bigger, badder designs, which are the most complex designs. Deals are becoming more available and NREs are creeping up.”
Even where companies are keeping their flow intact, they’re asking for help in modifying or integrating IP. In general, large systems vendors modify everything, including standard IP and they look to the IP vendors to customize it because for them it is basically a black box. Small companies tend to need more integrated IP, which favors bigger IP providers such as ARM, Synopsys and Cadence, as well as companies that make their living putting the pieces together.
“Customers are starting to look for differentiation in IP,” said Navraj Nandra, senior director of marketing for DesignWare analog and MSIP at Synopsys. “Leading customers are not just starting to outsource IP—they’re outsourcing the entire team.”
There are mixed opinions about whether this favors large IP vendors over smaller ones. Cadence’s Roddy argues that it does, because they understand how multiple IP blocks interact, which is a big advantage in a complex SoC.
“There has been a slow movement toward IP consolidation,” Roddy said. “What’s behind that is that it takes multiple teams to address and tackle some of these challenges. There also has been a slow trend to bundle things from one supplier, but there is more of a comfort level that CAD, interface IP and tools are all on the same campus. There are still companies that build their own cells and libraries, but the hot new word is zero-based budgeting.”
What’s less clear is whether that same formula applies to non-standard IP.
“The IP scene is getting interesting because we’re seeing more IP providers entering that space, promising the lowest power, highest performance and lowest area,” said Arvind Shanmugvel, director of applications engineering at Ansys. “There are several ways that complexity is increasing. One is that the number of IPs integrated on an SoC has grown tremendously. If you look at a design for the mobile market there is clocking IP, SerDes, memory, mixed signal. The number of IP blocks bumps up complexity. Second, the number of shared power domains is increasing dramatically. And third, now you need multi-mode, multi-corner simulation for all for this.”
Shanmugvel noted that even the large IP vendors are having trouble keeping up with all the different process flavors being introduced by foundries. In addition, after 40nm the ability to develop IP for one foundry process and tweak it for another foundry’s process was no longer possible. Trying to play to all of those processes and foundries is become a major strain on all IP the large IP vendors, while specialty IP vendors may pick one or two foundry processes to maximize their investment—and also limit the amount of expertise needed to service customers.
That scenario is already playing out for Andes Technologies, which makes ultra low-power multi-core processor IP. “The customer can is able to identify the critical path and vulnerabilities, but they do not have the capability to customize the software,” said Emerson Hsiao, senior vice president of sales and technical service for the North American Operations of Andes Technology. “We can offer a software package to the end customer, but we also can offer a custom engine as a service. If they identify the critical path, we will help them to create custom instructions. This is valuable because each customer is familiar with their system, but not with the microprocessor. So we might be able to create a custom engine in two hours. If we give the same tools to the customer, it could take them weeks.”
Regardless of which IP vendors are benefiting most, though, the challenge of integrating IP isn’t going down. Whether that service ultimately is provided by the IP vendors, or by third party services providers, is not so important at the moment because there is so much opportunity on all sides.
The role of automation
Historically, EDA has taken on some of these issues and figured out ways to add efficiency and automate them. Many challenges that used to require outside expertise or contractors during crunch time have been solved. But as complexity grows, and the sheer number of choices about what to use where explodes, there is some question about whether things have fundamentally changed.
That would be good news for the services industry, and there is no sign that services revenue for the semiconductor industry is weakening. There also are some very active standards efforts underway to help provide a path to solving these problems, particularly on the verification side with the Portable Stimulus Working Group and on the power side with UPF 3.0. But the chances are slim that standards will be able to actually help automate power issues, particularly when it comes to integration of an increasing number of IP blocks.
“The integration of IP always will be a challenge,” said Anand Iyer, director of marketing for the low power platform at Calypto. “IP vendors may be promising bigger improvements, but the reality is typically lower, and right now there is no standardized offering. As the ecosystem learns how to work with it, though, there may be more automated support, which will quickly replace existing services. We saw this with power gating, where you used to need outside experts, but with new tools it became a commodity.”
How fast this happens, and how far automation reaches, is anyone’s guess. But as complexity continues to grow, and as power—static and dynamic—becomes an ever-increasingly important factor in design, the likelihood is high that demand will increase for expertise in the long list of new challenges that need to be tackled.