The Great Machine Learning Race


Processor makers, tools vendors, and packaging houses are racing to position themselves for a role in machine learning, despite the fact that no one is quite sure which architecture is best for this technology or what ultimately will be successful. Rather than dampen investments, the uncertainty is fueling a frenzy. Money is pouring in from all sides. According to a new Moor Insights report,... » read more

10 Ways To Skin A Formal Puzzle


During the holidays, OneSpin issued a challenge to solve the classic Einstein’s Riddle using any formal verification tool. Although this puzzle was meant to be a little holiday fun, its solution required thought and some useful formal techniques applicable in everyday functional verification. We received a broad range of answers from engineers across the globe in different companies, inclu... » read more

Challenges Grow For IP Reuse


As chip complexity increases, so does the complexity of IP blocks being developed for those designs. That is making it much more difficult to re-use IP from one design to the next, or even to integrate new IP into an SoC. What is changing is the perception that standard [getkc id="43" kc_name="IP"] works the same in every design. Moreover, well-developed [getkc id="100" kc_name="methodologie... » read more

Quality Issues Widen


As the amount of semiconductor content in cars, medical and industrial applications increases, so does the concern about how long these devices will function properly—and what exactly that means. Quality is frequently a fuzzy concept. In mobile phones, problems have ranged from bad antenna placement, which resulted in batteries draining too quickly, to features that take too long to load. ... » read more

Why Auto Designs Take So Long


Designing chips for the automotive market is adding significant overhead, particularly for chips with stringent safety requirements. On the verification side it could result in an additional 6 to 12 months of work. On the design side, developing the same processor in the mobile market would take 6 fewer man months. And when it comes to complex electronic control units (ECUs) or [getkc id="81... » read more

Dealing With Unintended Behavior


Functional verification was already tough enough, but having to identify behaviors that were never defined or intended opens up the search space beyond what existing tools are capable of handling. However, while you may not be able to eliminate unintended behaviors, a design team is not helpless. There are several steps that can be taken to reduce the likelihood of these problems getting int... » read more

Embedded FPGAs Come Of Age


FPGAs increasingly are being viewed as a critical component in heterogeneous designs, ratcheting up their stature and the amount of attention being given to programmable devices. Once relegated to test chips that ultimately would be replaced by lower-power and higher-performance ASICs if volumes were sufficient, FPGAs have come a long way. Over the last 20 years programmable devices have mov... » read more

Find Your Way To San Jose Next Week… For DVCon, Of Course!


If you’re asked “Do you know the way to San Jose?” in the next few days, chances are it’s a newbie to DVCon. Everyone else in chip design verification knows the way to the annual Design and Verification Conference and Exhibition about to convene at the San Jose DoubleTree Hotel. This year’s program is stacking up to be an insightful and educational four days of tutorials, paper ses... » read more

Uncovering Unintended Behavior


Very few companies ever had to worry about security until recently. Over the past couple of years, we have seen increasing evidence that our connected systems are vulnerable. The recent distributed denial of service (DDoS) attack, which made many Internet sites unavailable, has focused attention on Internet of Things (IoT) devices such as digital video recorders and cameras that have Internet a... » read more

Sigasi: Cleaner VHDL And SystemVerilog


Hardware engineers always have looked at software tools and methodologies with a certain degree of envy. While the hardware side has embraced the discipline necessary to get products right prior to release, in large part because it's too expensive to fix an error in hardware, the tools and languages are generally clunkier and the methodologies are much more rigid. Like software, they have to in... » read more

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