Quantum Effects At 7/5nm And Beyond


Quantum effects are becoming more pronounced at the most advanced nodes, causing unusual and sometimes unexpected changes in how electronic devices and signals behave. Quantum effects typically occur well behind the curtain for most of the chip industry, baked into a set of design rules developed from foundry data that most companies never see. This explains why foundries and manufacturing e... » read more

CMOS-Embedded STT-MRAM Arrays In 2xnm Nodes For GP-MCU Applications


Perpendicular Spin-Transfer Torque (STT) MRAM is a promising technology in terms of read/write speed, low power consumption and non-volatility, but there has not been a demonstration of high density manufacturability at small geometries. In this paper we present an unprecedented demonstration of a robust STT-MRAM technology designed in a 2x nm CMOS- embedded 40 Mb array. Key features are full a... » read more

New Nodes, Materials, Memories


Ellie Yieh, vice president and general manager of Advanced Product Technology Development at [getentity id="22817" e_name="Applied Materials"], and head of the company's Maydan Technology Center, sat down with Semiconductor Engineering to talk about challenges, changes and solutions at advanced nodes and with new applications. What follows are excerpts of that conversation. SE: How far can w... » read more

A New Memory Contender?


Momentum is building for a new class of ferroelectric memories that could alter the next-generation memory landscape. Generally, ferroelectrics are associated with a memory type called ferroelectric RAMs (FRAMs). Rolled out by several vendors in the late 1990s, FRAMs are low-power, nonvolatile devices, but they are also limited to niche applications and unable to scale beyond 130nm. While... » read more

What Happened To ReRAM?


Resistive RAM (ReRAM), one of a handful of next-generation memories under development, is finally gaining traction after years of setbacks. Fujitsu and Panasonic are jointly ramping up a second-generation ReRAM device. In addition, Crossbar is sampling a 40nm ReRAM technology, which is being made on a foundry basis by China’s SMIC. And not to be outdone, TSMC and UMC recently put ReRAM on ... » read more

Four Foundries Back MRAM


Four major foundries plan to offer MRAM as an embedded memory solution by this year or next, setting the stage for what finally could prove to be a game-changer for this next-generation memory technology. GlobalFoundries, Samsung, TSMC and UMC plan to start offering spin-transfer torque magnetoresistive RAM (ST-MRAM or STT-MRAM) as an alternative or a replacement to NOR flash, possibly start... » read more

What Is Spin Torque MRAM?


The memory market is going in several different directions at once. On one front, the traditional memory types, such as DRAM and flash, remain the workhorse technologies. Then, several vendors are readying the next-generation memory types. As part of an ongoing series, Semiconductor Engineering will explore where the new and traditional memory technologies are heading. For this segment, P... » read more

New Embedded Memories Ahead


The embedded memory market is beginning to heat up, fueled by a new wave of microcontrollers (MCUs) and related chips that will likely require new and more capable nonvolatile memory types. The industry is moving on several different fronts in the embedded memory landscape. On one front, traditional solutions are advancing. On another front, several vendors are positioning the next-generatio... » read more

Material And Process Challenges In A Changing Memory Landscape


Moore’s Law has fueled the semiconductor industry’s growth for decades. But as the complexity of scaling increases, extending the economics of Moore’s Law is becoming a challenge. One example illustrating the challenges of maintaining the economic benefits of Moore’s Law is the difficulty of IC chip patterning. Today, this requires an expensive litho scanner, a complicated spacer and... » read more

Power/Performance Bits: May 24


Reducing MRAM chip area Researchers from Tohoku University developed a technology to stack magnetic tunnel junctions (MTJ) directly on the via without causing deterioration to its electric/magnetic characteristics. The team focused on reducing the memory cell area of spin-transfer torque magnetic random access memory (STT-MRAM) in order to lower manufacturing costs, making them more compe... » read more

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