The Glass Substrate Question: When Will It Replace Copper Clad Laminate?


"When will glass replace copper clad laminate on advanced IC substrates?" That’s a question many on the heterogeneous integration (HI) side of the semiconductor industry are asking. Unfortunately, the answer is not straightforward. But before we get to answering that, let’s take an advanced IC substrate (AICS) refresher. In other words, how did we get to the point where glass substrat... » read more

The Growing Importance Of PMIC Validation


In the ever-evolving world of technology, the semiconductor industry plays a pivotal role in shaping the devices we use daily. Among the countless components that make up these devices, Power Management Integrated Circuits (PMICs) have emerged as unsung heroes, silently ensuring the efficient use of power resources. PMICs are specialized integrated circuits designed to manage and regulate th... » read more

Automotive Safety Requires PVT Monitoring IP Within Semiconductor ICs


The modern automobile, especially with the move toward more electrification, presents huge challenges to the designers of vehicular electronics. Gone are the days of mechanical issues and oil changes being primary concerns. Today’s automobile has a high number of semiconductor chips performing functions for self-driving autonomous systems, advanced driver assistance systems (ADAS), connectivi... » read more

Test Strategies In The Era Of Heterogeneous Integration


Moore’s Law, the observation that the number of transistors on an integrated circuit doubles approximately every two years, is critical to advances in computing technology. For decades, fabs have managed to achieve exponential growth in digital capability and transistor density by making transistors smaller and smaller, but we’ve hit the physical limits of these processes. Today, new proces... » read more

MMAF Option Enables Picoampere Measurements


By Yoshiyuki Aoki and Tsunetaka Akutagawa Demand for low-current devices is increasing, as many new sensors are being created for medical, automotive, industrial, and other applications. Chief among the heightened production and test requirements for these low-current devices is the need to achieve picoampere (pA)-class measurements. Sensors’ functionality and efficacy, especially in medic... » read more

Improving Reliability In Chips


Semiconductor Engineering sat down to discuss changes in test that address tracing device quality throughout a product’s lifetime with Tom Katsioulas, CEO at Archon Design Solutions and U.S. Department of Commerce IoT advisory board member; Ming Zhang, vice president of R&D Acceleration at PDF Solutions; and Uzi Baruch, chief strategy officer at proteanTecs. What follows are excerpts of t... » read more

Research Bits: September 11


Combining digital and analog Researchers from École Polytechnique Fédérale de Lausanne (EPFL) propose integrating 2D semiconductors with ferroelectric materials for joint digital and analog information processing, which could improve energy efficiency and support new functionality. The device uses a 2D negative-capacitance tungsten diselenide/tin diselenide tunnel FET (TFET), which consu... » read more

Synopsys Timing Constraints Manager: Constraint Verification


Constraint verification refers to the verification of the contents of an SDC file to flag situations where the specified constraints are either incorrect, or incomplete, both of which, if not addressed, could result in silicon failure. The key to constraint verification is the ability to flag real issues without swamping an engineer with noise: issues that upon designer review result in no chan... » read more

proteanTecs On-Chip Monitoring And Deep Data Analytics System


High reliability applications in service-critical markets, such as autonomous driving and cloud computing, demand maximum performance and minimal power and cost. Reducing design margins while maintaining high reliability becomes imperative. State-of-the-art silicon processes offer mainly logic density improvements at limited speedup. Worst-case design analysis is not cost effective anymore. ... » read more

Technical Paper Roundup: Sept 11


New technical papers added to Semiconductor Engineering’s library this week. [table id=136 /] (more…) » read more

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