Blog Review: April 20


Cadence's Paul McLellan looks at the difference between 3D packaging and 3D integration and the different approaches to system-in-package designs. Siemens' Spencer Acain finds that despite having less precision and flexibility than digital chips, analog computing is having a resurgence in the space of cutting-edge AI thanks to the speed and energy efficiency in specialized tasks. Synopsys... » read more

Durability And Cost Benefits Drive Mil-Aero Demand For OCPP


Ceramic packages were, for many years, the option of choice for semiconductor prototype assembly, particularly in military-aerospace applications. They are able to withstand high temperatures and can be hermetically sealed. However, they can be costly and, while they allow for rapid assembly of first samples, the final product is typically a plastic package, so the ceramic prototype doesn’t o... » read more

Yield Enhancement By Virtual Fabrication


This paper provides an example of yield enhancement using virtual fabrication. A 6 transistors based static random access memory example on 7nm node technology was used in this case study. Yield loss caused by via contact-metal edge placement error was modeled and analyzed. The results show that yield can be enhanced from 48.4% to 99.0% through process window optimization and improved specifica... » read more

Real-time instruction-level verification of remote IoT/CPS devices via side channels


Abstract "In recent years, with the rise of IoT technology, wireless Cyber-Physical Systems (CPS) have become widely deployed in critical infrastructure, including power generation, military systems, and autonomous and unmanned vehicles. The introduction of network connectivity for data transfer, cloud support, etc., into CPS, can lead to malware injection. Meanwhile, outsourcing of advanced t... » read more

Reusing Verification Assertions as Security Checkers for Hardware Trojan Detection


Abstract "Globalization in the semiconductor industry enables fabless design houses to reduce their costs, save time, and make use of newer technologies. However, the offshoring of Integrated Circuit (IC) fabrication has negative sides, including threats such as Hardware Trojans (HTs) - a type of malicious logic that is not trivial to detect. One aspect of IC design that is not affected by g... » read more

Neuromorphic photonic circuit modeling in Verilog-A


Abstract "One of the significant challenges in neuromorphic photonic architectures is the lack of good tools to simulate large-scale photonic integrated circuits. It is crucial to perform simulations on a single platform to capture the circuit’s behavior in the presence of both optical and electrical components. Here, we adopted a Verilog-A based approach to model neuromorphic photonic cir... » read more

Turning MBSE Inside-Out For An RF EDA Shift Left


Model-based systems engineering (MBSE) focuses on creating and exploiting domain models in a digital modeling language. RF system designers trying to use generic MBSE tools soon run into a problem: developing behavioral models. Without high-fidelity models, simulations miss real-world results, and a digital twin won’t be worth the effort. What’s helping RF teams get engineering tasks done i... » read more

Technical Paper Round-Up: April 19


New technical papers include selective etching, ISO 26262 test bench, hardware accelerators, RISC-V, lidar, EUV mask inspection, fault attacks, edge computing, gallium oxide, and machine learning for VLSI CAD-on-chip power grid design. Cutting-edge research is now a global effort. It extends from the U.S. Air Force, to schools such as MIT, and universities in Italy, Spain, Portugal, India, K... » read more

Research Bits: April 19


Processor power prediction Researchers from Duke University, Arm Research, and Texas A&M University developed an AI method for predicting the power consumption of a processor, returning results more than a trillion times per second while consuming very little power itself. “This is an intensively studied problem that has traditionally relied on extra circuitry to address,” said Zhiy... » read more

Selective etching of silicon nitride over silicon oxide using ClF3 /H2 remote plasma


Researchers from Sungkyunkwan University, MIT and others present an option for selective etching. Abstract "Precise and selective removal of silicon nitride (SiNx) over silicon oxide (SiOy) in a oxide/nitride stack is crucial for a current three dimensional NOT-AND type flash memory fabrication process. In this study, fast and selective isotropic etching of SiNx over SiOy has been investiga... » read more

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