Choosing A Gate Driver For Silicon Carbide MOSFETs


If you are going to use a silicon carbide (SiC) MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) in your next development, you will ask yourself: how do I develop the best gate driver for it? The answer to this question is: identify a suitable gate driver IC based on the peak current and power dissipation requirements of your application and a fitting gate resistor for your SiC... » read more

Latency Considerations Of IDE Deployment On CXL Interconnects


Certain applications and hardware types – emerging memory, artificial intelligence/machine learning (AI/ML), and cloud servers, to name a few – can realize significant performance advantages when a low latency interface is employed. However, traditional interconnects like PCI Express (PCIe) often do not offer low enough latencies required to optimize these applications. In response, the Com... » read more

Multi-DRAM Memory Subsystems In SoCs


Even with DRAM capacity going up with each generation of DRAM, the demand for memory densities by a variety of applications is growing at an even faster rate. To support these high memory densities and bus width requirements (that are typically more than what a single DRAM can support), almost all the new generation of memory subsystems and SoCs have multiple DRAM dies combined to effectively c... » read more

Bringing Scalable Power Integrity Analysis To Analog IC Designs


Power integrity is a broad term in integrated circuit (IC) design and verification. However, when IC engineers are working through design signoff, power integrity analysis focuses on three specific aspects of a design: Power: Verify the chip design as implemented provides the total predicted power under different operating modes. Performance: Find and eliminate performance issues affect... » read more

Bringing Intelligent Headlamps To Light via Simulation


Once seen as a basic, utilitarian product feature, today automotive headlamps are becoming much more innovative — and a critical source of competitive differentiation. Intelligent headlamps, which autonomously produce adaptive light beams, are capturing the imagination of the world’s automakers and consumers alike. But how can automotive engineering teams verify the performance of their com... » read more

Introducing mPower


Power integrity analysis evaluates circuits to determine if they will provide their designed/intended performance and reliability as implemented. Designers must be able to verify analog and digital power integrity from the RTL/gate-level through die-level integrations up to the package and board system-level. The mPower toolset is an innovative power integrity verification solution that brings ... » read more

Rising Fortunes For ICs In Health Care


Semiconductors are increasingly finding their way into a variety of medical devices, after years of slow growth and largely consumer electronics types of applications. Nearly every major chipmaker has a toehold in health care these days, and many are starting to look beyond wearable such as the Apple Watch to devices that can be relied on for accuracy and reliability. Unlike in the past, the... » read more

Using IP-XACT To Solve Design And Verification Problems


As today’s SoC designs grow more complex and time-to-market (TTM) pressures rise, designers are looking for techniques to build and update designs easily. Key elements for addressing these SoC challenges include the incorporation of more commercial IP components, internal design IP reuse, and extensive automation of design and verification activities. Enhanced interoperability and reusability... » read more

How Semiconductor Solutions Address Safety Requirements Of Future Power Distribution Networks In Autonomous Vehicles


Open up the bonnet of any modern automobile and many of us would be hard-pressed to find anything that we could fix ourselves. With pipes and cables almost artistically integrated into the engine bay, and sleek plastic covers fitted everywhere, there is very little that can still be recognized, yet alone repaired. Perhaps the only location where we feel comfortable is the “fuse box”, or pow... » read more

Blog Review: Oct. 13


Cadence's Paul McLellan checks out what Google learned in developing multiple generations of its TPU processor, including unequal advancement of logic and memory, the importance of compiler of compatibility, and designing for total cost of ownership. Siemens EDA's Jake Wiltgen argues for the importance of linting as part of eliminating systematic failures in designs complying with ISO 26262.... » read more

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