Execution Dependence Extension (EDE): ISA Support For Eliminating Fences
By Various Writers - 13 Oct, 2021 - Comments: 0

Fence instructions are a coarse-grained mechanism to enforce the order of instruction execution in an out-of-order pipeline. They are an overkill for cases when only one instruction must wait for the completion of one other instruction. For example, this is the case when performing undo logging in Non-Volatile Memory (NVM) systems: while the update of a variable needs to wait until the correspo... » read more

MXene-GaN van der Waals metal-semiconductor junctions for high performance multiple quantum well photodetectors
By Technical Paper Link - 12 Oct, 2021 - Comments: 0

Abstract: "A MXene-GaN-MXene based multiple quantum well photodetector was prepared on patterned sapphire substrate by facile drop casting. The use of MXene electrodes improves the responsivity and reduces dark current, compared with traditional Metal-Semiconductor-Metal (MSM) photodetectors using Cr/Au electrodes. Dark current of the device using MXene-GaN van der Waals junctions is reduced b... » read more

A quantitative model for the bipolar amplification effect: A new method to determine semiconductor/oxide interface state densities
By Technical Paper Link - 12 Oct, 2021 - Comments: 0

Abstract "We report on a model for the bipolar amplification effect (BAE), which enables defect density measurements utilizing BAE in metal–oxide–semiconductor field-effect transistors. BAE is an electrically detected magnetic resonance (EDMR) technique, which has recently been utilized for defect identification because of the improved EDMR sensitivity and selectivity to interface defects.... » read more

The Everything New Syndrome
By Ed Sperling - 12 Oct, 2021 - Comments: 0

Technology is all about the latest features, the fastest processing, with the lowest power. While that sounds great in marketing pitch, any or all of those factors don't necessarily equate to a better product or long-term user satisfaction. There's a reason semiconductor companies are conservative by nature. They want to know that when they spend tens or hundreds of millions of dollars on a ... » read more

Manage Scaling Challenges For Silicon Success
By Siemens EDA - 12 Oct, 2021 - Comments: 0

Semiconductor companies are faced with significant challenges related to technology scaling, design scaling, and system scaling. These challenges have a broad impact on design development, manufacturing, and functional operation. This paper discusses the challenges and the specific impact of a Silicon Lifecycle Solutions approach that includes DFT, operations, and Embedded Analytics in enabling... » read more

Inspecting, Testing, And Measuring SiC
By Patrick Waurzyniak - 12 Oct, 2021 - Comments: 0

Achieving the auto industry's stringent zero defect goals is becoming a big challenge for makers of silicon carbide substrates, which are struggling to achieve sufficient yields and reliability as they migrate from 150mm to 200mm wafers and shift their focus away from pure silicon. SiC is a combination of silicon and harder carbide materials, and it has emerged as a key technology for batter... » read more

One Test Is Not Always Enough
By Anne Meixner - 12 Oct, 2021 - Comments: 0

To improve yield, quality, and cost, two separate test parameters can be combined to determine if a part passes or fails. The results gleaned from that approach are more accurate, allowing test and quality engineers to fail parts sooner, detect more test escapes, and ultimately to improve yield and reduce manufacturing costs. New data analytic platforms, combined with better utilization of s... » read more

Don’t Let X Be A Problem For Logic BIST
By Rahul Singhal - 12 Oct, 2021 - Comments: 0

By Rahul Singhal and Giri Podichetty A failure in the operation of integrated circuits (ICs) or chips deployed in safety-critical applications such as automotive, medical, and aerospace could have catastrophic consequences. These failures could stem from defects in the chip that escaped manufacturing tests or from transient faults that can occur during system operation due to factors such as... » read more

PCB And IC Technologies Meet In The Middle
By Bryon Moyer - 12 Oct, 2021 - Comments: 1

Surface-mount technology (SMT) is evolving far beyond its roots as a way of assembling packaged chips onto printed circuit boards without through-holes. It is now moving inside packages that will themselves be mounted on PCBs. But SMT for advanced packages isn’t the same as the SMT we’ve been used to. “Many systems include multiple ASICs, a lot of memory, and that's all integrated i... » read more

Packetized Test At The International Test Conference 2021
By Geir Eide - 12 Oct, 2021 - Comments: 0

At this year’s International Test Conference (October 10-15, 2021), Siemens Digital Industries Software is showcasing IC test and lifecycle management technologies that address the key scaling challenges facing the semiconductor industry now and in the future. The two main topics from Tessent at ITC are: The rapid adoption of packetized test strategies to address design and system... » read more

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