Why AI Systems Are So Hard To Predict
By Ed Sperling - 12 Jan, 2021 - Comments: 0

AI can do many things, but how to ensure that it does the right things is anything but clear. Much of this stems from the fact that AI/ML/DL systems are built to adapt and self-optimize. With properly adjusted weights, training algorithms can be used to make sure these systems don't stray too far from the starting point. But how to test for that, in the lab, the fab and in the field is far f... » read more

Testing Silicon Photonics In Production
By Bryon Moyer - 12 Jan, 2021 - Comments: 1

As silicon photonics costs come down, the technology is being worked into new applications, from connectivity to AI. But full commercial production requires testing those photonic circuits before shipping them. Photonics testing is only getting started. Volume production is still not happening, and test equipment and techniques are still being developed. What exists today is a blend of exist... » read more

DFT For SoCs Is Last, First, And Everywhere In Between
By Robert Ruiz - 12 Jan, 2021 - Comments: 0

Back in the dawn of time, IC test was the last task in the design flow. First, you designed the chip and then you wrote the functional test program to verify it performed as expected after manufacturing. Without much effort, some portion of the functional test program was often reused as the manufacturing test to determine that the silicon was defect-free. Fast forward to today and things ha... » read more

Using Analytics To Reduce Burn-in
By Anne Meixner - 12 Jan, 2021 - Comments: 3

Silicon providers are using adaptive test flows to reduce burn-in costs, one of the many approaches aimed at stemming cost increases at advanced nodes and in advanced packages. No one likes it when their cell phone fails within the first month of ownership. But the problems are much more pressing when the key components in data warehouse servers or automobiles fail. Reliability expectations ... » read more

Verifying Safety-Critical FPGA Designs With Fault Simulation
By Synopsys - 12 Jan, 2021 - Comments: 0

Supporting safety and assurance in designs, such as the chips used in industrial, aerospace and defense applications, requires more than traditional functional verification. Even if every bug is found and fixed before release, these applications have additional requirements for functional safety. They must be able to handle a variety of faults and induced errors, either by correcting them or by... » read more

System-Level Test Methodologies Take Center Stage
By Fabio Pizza - 12 Jan, 2021 - Comments: 0

Because electronic systems for all applications in end-user markets must provide the highest possible reliability to match customers’ quality expectations, semiconductor components undergo multiple tests and stress steps to screen out defects that could arise during their lifecycle. Due to new semiconductor devices’ increasing design complexity and extreme process technology, increased test... » read more

Part Average Test (PAT)
By yieldHUB - 12 Jan, 2021 - Comments: 0

With semiconductor manufacturers producing huge amounts of data, it can be hard to guarantee quality and reliability, even with internal tools. Many companies outsource Part Average Testing (PAT) to a bespoke yield management provider. Provided they meet the standards set out by AEC, the tool will be invaluable in guaranteeing quality and reliability for your customers. Click here to con... » read more

Improving the Performance Of Deep Neural Networks
By Technical Paper Link - 11 Jan, 2021 - Comments: 0

Source: North Carolina State University. Authors: Xilai Li, Wei Sun, and Tianfu Wu Abstract: "In state-of-the-art deep neural networks, both feature normalization and feature attention have become ubiquitous. They are usually studied as separate modules, however. In this paper, we propose a light-weight integration between the two schema and present Attentive Normalization (AN). Instead of l... » read more

Versatile Thin‐Film Transistor with Independent Control of Charge Injection and Transport for Mixed Signal and Analog Computation
By Technical Paper Link - 11 Jan, 2021 - Comments: 0

Source: University Of Surrey: Eva Bestelink Olivier de Sagazan Lea Motte Max Bateson Benedikt Schultes S. Ravi P. Silva Radu A. Researchers at University of Surrey and Université de Rennes developed a new device, called a Multimodal Transistor (MMT), that is immune to parasitic effects. In the MMT, on/off switching is controlled independently from the amount of current passing th... » read more

Solution-processable integrated CMOS circuits based on colloidal CuInSe2 quantum dots
By Technical Paper Link - 11 Jan, 2021 - Comments: 0

Researchers at Los Alamos National Laboratory and University of California Irvine used quantum dots to create transistors which can be assembled into functional logic circuits. “Potential applications of the new approach to electronic devices based on non-toxic quantum dots include printable circuits, flexible displays, lab-on-a-chip diagnostics, wearable devices, medical testing, smart im... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2026 SMG   |  Terms of Service  |  Privacy Policy