Week In Review: Auto, Security, Pervasive Computing


Automotive Self-driving car company Cruise now has driverless cars on the streets of San Francisco, Calif., reports the San Francisco Chronicle. Cruise, which is backed by General Motors, is testing five driverless cars in the urban — and very hilly — environment of San Francisco. Cruise is using an EV — the Chevy Bolt — as a test vehicle. At Level 4 driving, the cars will not have a w... » read more

Fast, Low-Power Inferencing


Power and performance are often thought of as opposing goals, opposite sides of the same coin if you will. A system can be run really fast, but it will burn a lot of power. Ease up on the accelerator and power consumption goes down, but so does performance. Optimizing for both power and performance is challenging. Inferencing algorithms for Convolutional Neural Networks (CNN) are compute int... » read more

What Designers Need to Know About Error Correction Code (ECC) In DDR Memories


As with any electronic system, errors in the memory subsystem are possible due to design failures/defects or electrical noise in any one of the components. These errors are classified as either hard-errors (caused by design failures) or soft-errors (caused by system noise or memory array bit flips due to alpha particles, etc.). To handle these memory errors during runtime, the memory subsyst... » read more

Re-Architecting SerDes


Serializer/Deserializer (SerDes) circuits have been helping semiconductors move data around for years, but new process technologies are forcing it to adapt and change in unexpected ways. Traditionally implemented as an analog circuit, SerDes technology has been difficult to scale, while low voltages, variation, and noise are making it more difficult to yield sufficiently. So to remain releva... » read more

Functional Safety For Fail-Operational Systems


Functional safety issues have long been an important part of product development wherever machine operations that are potentially dangerous for humans are carried out unattended. However, in terms of electrical and electronic systems, the need has been limited to a few industries such as medical technology and aerospace. Apart from that, the functional safety concepts were only used for niche p... » read more

Low Power Still Leads, But Energy Emerges As Future Focus


In 2021 and beyond, chips used in smartphones, digital appliances, and nearly all major applications will need to go on a diet. As the amount of data being generated continues to swell, more processors are being added everywhere to sift through that data to determine what's useful, what isn't, and how to distribute it. All of that uses power, and not all of it is being done as efficiently as... » read more

Attaching Fibers To Photonic Chips


Recently, Cadence held its fifth photonics summit, CadenceCONNECT: Photonics Contribution to High-Performance Computing. You can read my earlier posts: Photonic Integration—From Switching to Computing How to Design Photonics If You Don't Have a PhD: iPronics and Ayar Labs The third day was all about how to connect the incoming and outgoing fibers to the photonics chips. I will cov... » read more

Standard Benchmarks For AI Innovation


There is no standard measurement for machine learning performance today, meaning there is no single answer for how companies build a processor for ML across all use cases while balancing compute and memory constraints. For the longest time, every group would pick a definition and test to suit their own needs. This lack of common understanding of performance hinders customers' buying decis... » read more

Pushing The Envelope With HBM2E Memory


In September, Rambus announced the achievement of reaching 4 gigabits per second (Gbps) operation with our HBM2E memory interface. This milestone was demonstrated in silicon and required mastering substantial signal integrity and power integrity (SI/PI) challenges. The 4 Gbps mark represents a 20% rise from the previous maximum data rate of 3.2 Gbps for HBM2E. To date, the industry’s faste... » read more

Waking And Sleeping Create Current Transients


Silicon power-saving techniques are helping to reduce the power required by data centers and other high-intensity computing environments, but they’ve also added a significant challenge for design teams. As islands on high-powered chips go to sleep and wake up, the current requirements change quickly. This happens in a few microseconds, at most. The rapid change of loading creates a challen... » read more

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