New RDL-First PoP Fan-Out Wafer-Level Package Process With Chip-to-Wafer Bonding Technology

By Amkor - 16 Dec, 2020 - Comments: 0

Fan-Out Wafer-Level Interposer Package-on Package (PoP) design has many advantages for mobile applications such as low power consumption, short signal path, small form factor, and heterogeneous integration for multifunctions. In addition, it can be applied in various package platforms, including PoP, System-in-Package (SiP), and Chip Scale Package (CSP). These advantages come from advanced inte... » read more

A Production-Worthy Fan-Out Solution — ASE FOCoS Chip Last

By ASE - 16 Dec, 2020 - Comments: 0

The 5th Generation (5G) wireless systems popularity will push the package development into a high performance and heterogeneous integration form. For high I/O density and high performance packages, the promising Fan Out Chip on Substrate (FOCoS) provides a solution to match outsourced semiconductor assembly and testing (OSAT) capability. FOCoS is identified the Fan Out (FO) package, which can f... » read more

Revealing DRAM Operating GuardBands through Workload-Aware Error Predictive Modeling

By Technical Paper Link - 15 Dec, 2020 - Comments: 0

Abstract Abstract—Improving the energy efficiency of DRAMs becomes very challenging due to the growing demand for storage capacity and failures induced by the manufacturing process. To protect against failures, vendors adopt conservative margins in the refresh period and supply voltage. Previously, it was shown that these margins are too pessimistic and will become impractical due to high ... » read more

Manufacturing Bits: Dec. 15

By Mark LaPedus - 15 Dec, 2020 - Comments: 0

Ghost imaging quantum microscopes The U.S. Department of Energy’s (DOE) Brookhaven National Laboratory has begun building a quantum-enhanced X-ray microscope based on a technology called ghost imaging. Still in R&D, quantum X-ray microscopes promise to provide higher resolution images with less damage to a sample. Using the National Synchrotron Light Source II (NSLS-II), researcher... » read more

Automation And Fault Simulation Of Safety-Critical FPGA Designs

By Joe Mallett - 15 Dec, 2020 - Comments: 0

Functional safety is a major challenge for field programmable gate arrays (FPGAs) and other semiconductor designs. Safety requirements go beyond traditional verification, which focuses on design bugs. Chips in safety-critical applications must be able to handle a variety of faults from sources such as temperature and power extremes, device aging, radiation, ionization and component failures. Ap... » read more

10X Faster Electromagnetic 3D Simulation

By Denis Soldo - 15 Dec, 2020 - Comments: 0

Virtual prototypes are essential to optimize the signal integrity performance of their high-performance electronics products. Today, engineering teams are pushing to get fast electromagnetic (EM) simulations of printed circuit boards (PCB) and 3D chip packages in just a few hours with the highest level of accuracy. The state of the art in EM simulation has come a long way: Back in 2000 it wa... » read more

Power/Performance Bits: Dec. 15

By Jesse Allen - 15 Dec, 2020 - Comments: 0

Graphite films for cooling electronics Researchers at King Abdullah University of Science and Technology (KAUST) developed a way to make a carbon material well suited to dissipating heat in electronic devices. Graphite films are frequently used for heat management. "However, the method used to make these graphite films, using polymer as a source material, is complex and very energy intensiv... » read more

Power Models For Machine Learning

By Brian Bailey - 14 Dec, 2020 - Comments: 1

AI and machine learning are being designed into just about everything, but the chip industry lacks sufficient tools to gauge how much power and energy an algorithm is using when it runs on a particular hardware platform. The missing information is a serious limiter for energy-sensitive devices. As the old maxim goes, you can't optimize what you can't measure. Today, the focus is on functiona... » read more

Week In Review: Manufacturing, Test

By Mark LaPedus - 11 Dec, 2020 - Comments: 0

Government policy--semiconductors Eighteen members of the European Union have launched an initiative to boost the EU’s efforts in processors and semiconductor technologies. The member nations will also work together to bolster leading-edge manufacturing capacity. The EU plans to invest up to $145 billion in the effort. “Europe has all it takes to diversify and reduce critical dependenci... » read more

Week In Review: Design, Low Power

By Jesse Allen - 11 Dec, 2020 - Comments: 0

RISC-V RISC-V International CEO Calista Redmond provided an update on the state of the community during the annual RISC-V Summit: “RISC-V has had an incredible year of growth and momentum. This year, our technical community has grown 66 percent to more than 2,300 individuals in our more than 50 technical and special interest groups. We’re seeing increased market momentum of RISC-V cores, S... » read more

← Older posts Newer posts →