Simulating The Hyperloop


When SpaceX held the first Hyperloop Design Weekend Competition in Texas in January 2016, a team of five students from the Universitat Politècnica de València (UPV) in Spain, calling themselves Hyperloop UPV, won awards for Best Overall Concept Design and Best Propulsion System. The overall concept was to use magnetic levitation to give their Hyperloop vehicle a frictionless ride through t... » read more

An Integrated Approach To Power Domain And Clock Domain Crossing Verification


Reducing power consumption is essential for both mobile and data center applications. The challenge is to lower power while minimally impacting performance. The solution has been to partition designs into multiple power domains which allow selectively reducing voltage levels or powering off partitions. Traditional low power verification validates only the functional correctness of power control... » read more

Tapping Into Purpose-Built Neural Network Models For Even Bigger Efficiency Gains


Neural networks can be categorized as a set of algorithms modelled loosely after the human brain that can ‘learn’ by incorporating new data. Indeed, many benefits can be derived from developing purpose-built “computationally efficient” neural network models. However, to ensure your model is effective, there are several key requirements that need to be considered. One critical conside... » read more

Make Hardware Strong With CWE


What is a weakness? And why should we care? These questions are relevant in probably any field or context you may think of, well beyond engineering or electronics. While in some cases the first-level answers might be obvious, in many others they are not. Generally, weaknesses are considered bad things that can lead to malfunctions, injuries, and other undesirable situations. In many cases, they... » read more

Detecting Electrical Hazards Incurred By Inter-Voltage Domain Crossing In Custom SRAMs


Fast-growing markets, such as 5G, biotechnology, AI, and automotive, are driving a new wave of low-power semiconductor design requirements and, hence, more aggressive low-power management techniques are needed. Consequently, even large macros within a chip, such as SRAMs, now feature multiple voltage domains to limit power draw during light-sleep, deep-sleep, and shutdown-low-power modes. These... » read more

Blog Review: Dec. 9


Arm's Benoit Labbe digs into designing a power converter for Arm Research's ultra-low power M0N0 microcontroller, with a focus on optimal efficiency and leakage constraints. Mentor's Harry Foster tries to get a sense of how much effort is spent in verification of FPGAs by looking at the amount of time spent and number of engineers on a project. Cadence's Paul McLellan listens in as Odile ... » read more

Towards Self-Driving Cars: MIPI D-PHY Enabling Advanced Automotive Applications


Because both viewing and sensing ADAS applications must handle imaging, sensing, high-speed serial communication, and downstream processing functions, Camera Video Processors (CVPs) are always located at the heart of these systems. As more cameras and sensors are added to the system to aid in increasingly complicated tasks, more integrated CVP solutions are required. Ideally, these CVPs should ... » read more

New Security Approaches, New Threats


New and different approaches to security are gaining a foothold as the life expectancy for advanced chips increases, and as emerging technologies such as quantum computing threaten to crack even the most complex encryption schemes. These approaches include everything from homomorphic encryption, where data is processed without being decrypted, to different ways of sending and receiving data ... » read more

HPC Appliance Boosts Simulation Performance


High-performance computing (HPC) resources can provide a substantial boost to simulation, but an HPC cluster can be complex and difficult to manage. By deploying a managed HPC cluster for ARA, the client was able to eliminate internal maintenance and support overhead, while improving productivity and reliability for their Ansys workloads. Click here to read more. » read more

How To Speed Up Large-Scale EM Simulation Of ICs Without Compromising Accuracy


With growing on-chip radio frequency (RF) content, electromagnetic (EM) simulation of the passives is critical for a variety of reasons — from selecting the right RF design candidates to detecting parasitic coupling that directly impacts performance. Being on-chip, accurate EM analysis requires a tie into the process technology in the form of process design kits (PDKs) as well as a foundry-ce... » read more

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