Week In Review: Manufacturing, Test

By Mark LaPedus - 27 Nov, 2020 - Comments: 0

Market research VLSI Research has raised its forecast for semiconductors and fab equipment in 2020. In its previous forecast, VLSI Research projected that the equipment market would reach $84.8 billion in 2020, up 10.1% over 2019. Now, in its latest forecast (See page 2), the equipment market is projected to hit $89.8 billion in 2020, up 16.6%. “The equipment business is booming,” said ... » read more

Week In Review: Design, Low Power

By Jesse Allen - 27 Nov, 2020 - Comments: 0

AI Mythic debuted its Analog Matrix Processor for edge AI applications such as smart home, AR/VR, drones, video surveillance, smart city, and industrial. The M1108 AMP combines 108 tiles made up of an array of flash cells and ADCs, a 32-bit RISC-V nano-processor, a SIMD vector engine, SRAM, and a high-throughput Network-on-Chip router. It uses 40nm technology and the company says typical power... » read more

Week In Review: Auto, Security, Pervasive Computing

By SE Staff - 27 Nov, 2020 - Comments: 0

Automotive/Mobility China may act to rein in its EV market, according a story in Nikkei Asia. The National Development and Reform Commission in China asked for investment and production plans for EV projects over the last five years, which is signal to some industry insiders that the government may regulate some of the industry. Softbank and carmaker Subaru completed a test that used a 5G n... » read more

Manufacturing Bits: Nov. 25

By Mark LaPedus - 25 Nov, 2020 - Comments: 0

Lidar-on-a-chip At the upcoming IEEE International Electron Devices Meeting (IEDM), Samsung will present a paper on the industry’s first single-chip lidar beam scanner. (Go to this link and then look for paper 7.2, “Single-Chip Beam Scanner with Integrated Light Source for Real-Time Light Detection and Ranging,” J. Lee et al, Samsung.) Lidar, or light imaging, detection, and ranging, ... » read more

Blog Review: Nov. 25

By Jesse Allen - 25 Nov, 2020 - Comments: 0

Mentor's Harry Foster finds growing complexity in FPGA design by looking at the number of embedded microprocessors, asynchronous clock domains, and safety/security features in the 2020 Wilson Research Group Functional Verification Study. Cadence's Paul McLellan points to the interim SRC/SIA Decadal Plan for Semiconductors and five big shifts it identifies in information and communication tec... » read more

Security Gaps In Open Source Hardware And AI

By Ed Sperling - 25 Nov, 2020 - Comments: 1

Semiconductor Engineering sat down to discuss security risks across multiple market segments with Helena Handschuh, security technologies fellow at Rambus; Mike Borza, principal security technologist for the Solutions Group at Synopsys; Steve Carlson, director of aerospace and defense solutions at Cadence; Alric Althoff, senior hardware security engineer at Tortuga Logic; and Joe Kiniry, princi... » read more

Elasticity Without Compromise

By Matt Commens - 25 Nov, 2020 - Comments: 1

At the dawn of the twenty-first century, the available RAM on a physical machine dictated, and ultimately limited, the size of designs that Ansys HFSS could simulate. This prompted engineers to buy incredibly expensive pieces of hardware — well into the six figures — to solve their most challenging problems. By necessity, engineers learned to “divide and conquer” their largest, most ... » read more

What Interested You In 2020

By Brian Bailey - 24 Nov, 2020 - Comments: 0

In business you are always told to follow the money, but for us it is more important to follow the readership. If we are not writing what you want to read, then we are missing the mark. I like to review the ones that have garnered the most attention, in part to see if that will influence what I write about for 2021, but also to find out where the industry is looking for the most help. As Sem... » read more

Silo Busting In The Design Flow

By Brian Bailey - 24 Nov, 2020 - Comments: 0

An increasing number of dependencies in system design are forcing companies, people, tools, and flows to become more collaborative. Design and EDA companies must adapt to this new reality because it has become impossible for anyone to do it all by themselves. Moreover, what happens in manufacturing and packaging needs to be considered up front, and what gets designed in the design phase may ... » read more

System Design For Next-Generation Hyperscale Data Centers

By Frank Schirrmeister - 24 Nov, 2020 - Comments: 0

As we are in the process of hyperscaling the large volumes of data that our devices and sensors create, processing this data along the way at far and near edges, and transmitting the hard-to-imagine volumes of data through networks to data centers for processing, the data center itself is undergoing a fundamental shift with new networking and architecture co-design opportunities. In a previous ... » read more

← Older posts Newer posts →