Impact Of Instruction Memory On Processor PPA


The area of any part of a design contributes both to the silicon cost and to the power consumption. A simplistic following of the “A” in a processor IP vendor’s PPA numbers can be misleading. A processor is never in isolation but is part of a subsystem additionally including instruction memory, data memory, and peripherals. In most cases, instruction memory will be dominant and the proc... » read more

Using AI And Bugs To Find Other Bugs


Debug is starting to be rethought and retooled as chips become more complex and more tightly integrated into packages or other systems, particularly in safety- and mission-critical applications where life expectancy is significantly longer. Today, the predominant bug-finding approaches use the ubiquitous constrained random/coverage driven verification technology, or formal verification techn... » read more

Brute-Force Analysis Not Keeping Up With IC Complexity


Much of the current design and verification flow was built on brute force analysis, a simple and direct approach. But that approach rarely scales, and as designs become larger and the number of interdependencies increases, ensuring the design always operates within spec is becoming a monumental task. Unless design teams want to keep adding increasing amounts of margin, they have to locate th... » read more

ESD P2P And CD Verification Doesn’t Have To Be Hard


As a designer or verification engineer, you’re fighting the effects of electrostatic discharge (ESD) in your integrated circuit (IC) designs all the time. ESD is one of those frustrating issues that can challenge even the most experienced designers. Once an IC is in the market, unexpected electrical shorts will cause immediate failure or dielectric breakdown will result in gradual circuit deg... » read more

Virtual Prototyping For Power Electronics Systems


By Alan Courtay and Gobi Kengara Palayam Appavoo Every day, power electronics systems play a bigger role in our lives. All-electric and hybrid vehicles are now common on our streets. Electrification of the aerospace industry is accelerating, and observers expect hybrid and electric aircraft to make an impact over the next decade or two. Many industrial systems rely increasingly on electronic... » read more

Structural Integrity Of Chips


A new challenge is on the horizon, and it's one that could have some interesting consequences for chip design — structural integrity. Ever since the introduction of finFETs and 3D NAND, the lines have been blurring between electrical and mechanical engineering. After some initial reports of fins collapsing or breaking, and variable distances between layers, chipmakers figured out how to so... » read more

Computational Software


Electronics technology is evolving rapidly, becoming pervasive in our lives. There are more smart phones in use than there are people on earth, driver assistance is now common in automobiles, commercial airplanes have increasingly sophisticated infotainment, and wearable health monitors exist for a plethora of missions. Every device is generating and communicating massive amounts of data, inclu... » read more

The Growing Market For Specialized Artificial Intelligence IP In SoCs


Over the past decade, designers have developed silicon technologies that run advanced deep learning mathematics fast enough to explore and implement artificial intelligence (AI) applications such as object identification, voice and facial recognition, and more. Machine vision applications, which are now often more accurate than a human, are one of the key functions driving new system-on-chip (S... » read more

A Better Path From Simulink To RTL With Catapult HLS


Design teams working on ASIC or FPGA projects often start with algorithm exploration using MATLAB in order to prove out the mathematical behavior of the functional blocks at a high level of abstraction. MATLAB as a high-level programming language doesn’t support hardware architecture modeling, so many teams use the Simulink environment for performing model-based, multi-domain simulation of th... » read more

Accelerating Dry Etch Processes During Feature Dependent Etch


In dry etching, the trajectory of accelerated ions is non-uniform and non-vertical, due to collisions with gas molecules and other random thermal effects (figure 1). This has an impact on etch results, since the etch rate at any point on the wafer will vary depending on the solid angle visible to the bulk chamber and the ion flux for that angular range. These non-uniform and feature dependent e... » read more

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