Using Verification Data More Effectively
By Ann Mutschler - 29 Oct, 2020 - Comments: 0

Verification is producing so much data from complex designs that engineering teams need to decide what to keep, how long to keep it, and what they can learn from that data for future projects. Files range from hundreds of megabytes to hundreds of gigabytes, depending on the type of verification task, but the real value may not be obvious unless AI/machine learning algorithms are applied to a... » read more

Solving CSD Verification Challenges
By Ben Whitehead - 29 Oct, 2020 - Comments: 0

To tackle power consumption and slow execution, modern computational storage devices (CSD) seek to reduce data movement by including a small processing element next to the CSD (figure 1). The data request from the host is executed locally by the processing element, data is locally manipulated, and the result sent back to the host. Much less data is exchanged between storage and host, thus savin... » read more

Is Hardware-Assisted Verification Avoidable?
By Brian Bailey - 29 Oct, 2020 - Comments: 1

Emulation is emerging as the tool of choice for complex and large designs, but companies that swap from simulation to emulation increasingly recognize this is not an easy transition. It requires money, time, and effort, and even then not everyone gets it right. Still, there are significant benefits to moving from simulation to emulation, providing these systems can be utilized efficiently en... » read more

Embedded Processor Requirements And OS Choice
By Roddy Urquhart - 29 Oct, 2020 - Comments: 0

For each embedded product, software developers need to consider whether they need an operating system; and if so, what type of an OS. Operating systems vary considerably, from real-time operating systems with a very small memory footprint to general-purpose OSes such as Linux with a rich set of features. Choosing a proper type of operating system for your product – and consequently w... » read more

Trust Assurance And Security Verification Of Semiconductor IPs And ICs
By OneSpin Solutions - 28 Oct, 2020 - Comments: 0

Connected autonomous vehicles, 5G networks, Internet-of-things (IoT) devices, defense systems, and critical infrastructure use ASIC and FPGA SoCs running artificial intelligence algorithms or other complex software stacks. Vulnerable or tampered ICs can compromise the safety of people and the confidentiality, integrity, and availability of sensitive information. This paper analyzes the trust an... » read more

AMD Wants An FPGA Company, Too
By Ed Sperling - 28 Oct, 2020 - Comments: 0

AMD signed a definitive agreement to acquire Xilinx for $35 billion in stock, setting the stage for a head-to-head battle against Intel in nearly all major markets. But there's more to this acquisition than just keeping up with AMD's arch-competitor. To begin with, the acquisition has a big impact on the programmable logic market. The only pure-play FPGA vendors left are Lattice, Achronix, a... » read more

Virtual Verification Of Computational Storage Devices
By Mentor, a Siemens Business - 28 Oct, 2020 - Comments: 0

Over recent years, there has been a move to replace hard-disk drive (HDD) storage with solid-state drive (SSD) storage. SDDs are faster, contain no moving parts that can fail or be affected by environmental hazards, and the cost of SSDs has been dropping each year. Unfortunately, the verification of an SSD is quite complex. In particular because of hyperscale datacenter enterprise and client-dr... » read more

Are Today’s MEMS Gyros “Good Enough”?
By Bryon Moyer - 28 Oct, 2020 - Comments: 1

The gyroscope market is heating up, fueled by increasingly autonomous vehicles, robots, and industrial equipment, all of which are demanding greater precision and ever-smaller devices. Gyroscopes historically have been a staple in navigation for years. However, classic designs are macro-mechanical, and high-performance units can be very expensive. For lower-performance applications, micro-el... » read more

Blog Review: Oct. 28
By Jesse Allen - 28 Oct, 2020 - Comments: 0

Synopsys' Jacob Wilson provides some tips for how to prepare for the upcoming ISO SAE 21434 cybersecurity standard for road vehicles, starting with a security plan and understanding of risk levels. Cadence's Paul McLellan checks out Arm's first face-to-face wafer-bonded design, why it might be desirable, and some important aspects of how the proof-of-concept was developed. In a video, Men... » read more

Lower Process Nodes Drive Timing Signoff Software Evolution
By Synopsys - 28 Oct, 2020 - Comments: 0

A dramatic rise in design complexity has led to a slew of new signoff challenges that impact the ability to predictably meet PPA targets. Smaller technology nodes and larger design sizes have caused the number of corners and modes to grow exponentially leading to much longer turnaround times for timing signoff. Moreover, larger design sizes demand huge compute resources for timing signoff. I... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2026 SMG   |  Terms of Service  |  Privacy Policy