Measuring Reflective Surfaces


Manufacturers are adopting automated optical inspection (AOI) systems based on phase shift profilometry (PSP) for applications in advanced packaging processes. Many of these processes use front end-like techniques to create connections among die within a package and from the packaged die to the outside world. The technique offers fast, precise measurements of the 10µm to 100µm features that a... » read more

3 Challenges In Edge Designs


As companies begin exploring what will be necessary to win at the edge, they are coming up with some daunting challenges. Designing chips for the edge is far different than for the IoT/IIoT. The idea with the IoT was that simple sensors would relay data through a gateway to the cloud, where it would be processed and data could be sent back to the device as needed. That works if it's a small ... » read more

Week In Review: Design, Low Power


Synopsys acquired Qualtera, a provider of big data analytics for semiconductor test and manufacturing. Based in Montpellier, France and founded in 2010, Qualtera's Silicondash platform provides both off-line and in-line modules for data analytics, visualization, simulation, and modeling to allow for development of control strategies. Combined with Synopsys' TestMAX test automation solution, the... » read more

Week In Review: Manufacturing, Test


Chipmakers Jim Keller, senior vice president in the Technology, Systems Architecture and Client Group (TSCG) and general manager of the Silicon Engineering Group (SEG) at Intel, has resigned amid a major reorganization at the company. Here's one report about the situation. Cree as well as China’s Yutong Group and StarPower are working together to accelerate the commercial adoption of sili... » read more

Week In Review: Auto, Security, Pervasive Computing


Edge, cloud, data center Programmable logic company Efinix used Cadence’s Digital Full Flow to finish Efinix’s Trion FPGA family for edge computing, AI/ML and vision processing applications, according to a press release. Last week Efinix also announced three software defined SoCs based on the RISC-V core. The SoCs are optimized to the Trion FPGAs. AI, machine learning Amazon will tempo... » read more

Trustworthy Electronics


Global supplier networks are a key feature of the development of integrated electronic components today. Even in times of ever more complex trade relationships, supply chains must still function effectively. At the same time, it is necessary to achieve the technological advances required for the development of new products and maintain technological sovereignty. In view of the increasing dig... » read more

Data Center Scaling Requires New Interface Architectures


You can pick your favorite data points, but the bottom line is global data traffic is growing at an exponential rate driven by a confluence of megatrends. 5G networks are making possible billions of AI-powered IoT devices untethered from wired networks. Machine learning’s voracious appetite for enormous data sets is skyrocketing. Data intensive video streaming for both entertainment and busin... » read more

Essential DDR5 Features Designers Must Know


JEDEC has defined and developed three DDR standards – standard DDR, mobile DDR, and graphic DDR – to help designers meet their memory requirements. DDR5 will support a higher data rate (up to 6400 Mb/s) at a lower I/O Voltage (1.1V) and a higher density (based on 16Gb DRAM dies) than DDR4. DDR5 DRAMs and dual-inline memory modules (DIMMs) are expected to hit the market in 2020. This article... » read more

Is Common Resistance Affecting Your Analog Design Reliability And Performance?


Integrated circuit (IC) design reliability has always been important and essential to market success. After all, if no one could count on your product to operate as designed, and for as long as intended, there wouldn’t be many buyers! However, given the increase in the types and complexity of design applications, coupled with the increasing technological challenge of manufacturing at advance... » read more

Aging Problems At 5nm And Below


The mechanisms that cause aging in semiconductors have been known for a long time, but the concept did not concern most people because the expected lifetime of parts was far longer than their intended deployment in the field. In a short period of time, all of that has changed. As device geometries have become smaller, the issue has become more significant. At 5nm, it becomes an essential par... » read more

← Older posts Newer posts →