Business, Technology Challenges Increase For Photomasks

Complexity and costs are rising, and not all litho equipment and processes are fully vetted.

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Experts at the Table: Semiconductor Engineering sat down to discuss optical and EUV photomasks issues, as well as the challenges facing the mask business, with Naoya Hayashi, research fellow at DNP; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; Bryan Kasprowicz, senior director of technical strategy at Hoya; and Aki Fujimura, CEO of D2S. What follows are excerpts of that conversation.

Naoya Hayashi, research fellow at DNP; Bryan Kasprowicz, senior director of technical strategy at Hoya; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; and Aki Fujimura, CEO of D2S.

Left to right: Naoya Hayashi, research fellow at DNP; Bryan Kasprowicz, senior director of technical strategy at Hoya; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; and Aki Fujimura, CEO of D2S.


SE: For years, chipmakers patterned the most advanced chips using optical-based lithography scanners. In the scanner, chipmakers used optical masks, which consist of an opaque layer of chrome on a glass substrate. Why are masks important?

Kasprowicz: It brings the digital design into a physical world. That’s what used in the lithography process for manufacturing your chips. Each layer requires at least one mask to pattern, and then those are patterned on top of each other during the manufacturing process to eventually create the chips. That mask represents the design that you want. It is still a series of zeroes and ones from the digital space, but now it’s in the physical space. Optical masks are used in every node. However, there are less being used at the advanced nodes since extreme ultraviolet (EUV) lithography has been introduced.

SE: Chipmakers were able to extend 193nm wavelength lithography down to the 16nm/14nm and 10nm/7nm nodes. At those nodes, optical masks became more complex, right?

Hayashi: Basically, optical mask scaling has been driven by shorter wavelength sources in lithography. But as you know, we are currently using 193nm wavelength lithography. This is the end of the optical lithography source wavelength. So we need additional technologies like optical proximity correction (OPC), inverse lithography technology (ILT), or phase-shift masks to improve the printability and pattern fidelity, as well as to scale the device features. In that case, the pattern is very complex. So in mask-making, the data preparation, the mask writing and inspection processes have become very important — and created some challenges, as well.

Buck: As we reached the resolution limit of optical lithography, we’re striving to improve the process window or manufacturability of wafer lithography. And to do that we have to increase the complexity of the mask, either through additional features that correct for non-linearity and the lithography process using things like phase shifting. In phase-shift masks, you’re taking advantage of engineering in interference imaging. With 180-degree light phase differences, you can improve the slope of the image edges, which improves process window. And that adds complexity to the mask, which adds to manufacturing challenges to actually make masks.

Fujimura: One of the things that gave rise to the need for OPC or more sophisticated pattern manipulation is the migration toward the next technology nodes, such as going from 65nm to 45nm to 28nm. How do you increase the resolution with an acceptable process window without changing the lithography wavelength? There are many different techniques for resolution enhancement, collectively called resolution enhancement technologies (RET). Multiple patterning is one example. Phase shifting is another. So is source-mask optimization (SMO). One of the tricks is to manipulate the shapes on the mask. So when the light is cast onto the wafer, you get more of what you want on the wafer and get it more often. It’s called the process window. You want to be more reliable in wafer manufacturing, and you can improve the resilience to variation in manufacturing techniques by manipulating the shapes. The more curvilinear the shapes are on the mask, the better you can do in achieving the best wafer quality with better process windows. But the mask-making process becomes more complex. That’s why there is a tendency for mask complexity to increase for advanced nodes. It’s better for the overall semiconductor industry if the mask industry can do more complex curvilinear mask shapes reliably.

Kasprowicz: All masks are becoming more complex. As lithographers look for ways to extend single patterning or stay at double patterning optical, and improve patterning performance, advanced OPC and other RET strategies are needed. At some point, the switch to EUV may be more cost effective.

Fig. 1: A schematic illustration of various types of masks: (a) a conventional (binary) mask; (b) an alternating phase-shift mask; (c) an attenuated phase-shift mask. Source: Wikipedia

Fig. 1: A schematic illustration of various types of masks: (a) a conventional (binary) mask; (b) an alternating phase-shift mask; (c) an attenuated phase-shift mask. Source: Wikipedia

SE: Today’s 193nm wavelength optical lithography extended down to 7nm. At 5nm, it’s too complex to pattern the most advanced chips with optical lithography. So at 7nm/5nm and beyond, EUV lithography is required. But EUV masks are different than optical masks. What are some of the challenges here, and what’s next?

Kasprowicz: In traditional optical lithography, the masks use refractive optics, meaning light passes through the mask. It is a piece of glass with a light blocker of some sort on it, mainly chrome. So light passes through the glass on its way to the wafer. Light that hits the chrome gets blocked. In comparison, EUV lithography uses a 13.5nm wavelength. EUV masks are reflective. A light blocker, like optical, is also required. For EUV, tantalum has been the primary material. Now, light reflects off the mirror on the way to the wafer. Light that hits the absorber gets blocked. For EUV masks, there were a lot of the challenges early on, and even today, with the main one still being defects. The goal is to get to zero defects but we are not there yet. Here, defects in the multi-layer EUV mask are more important, because you start having some phase transitions in the light at that point. And they are nearly uncorrectable. People are working on a few things to compensate for those at the post-pattern stage, but they’re very hard to compensate. So that requires the end-user to employ some mitigation strategies to avoid those defects. Then, as you move up into the absorber in the EUV mask, those are traditional defects that you would see, like in an optical mask. Those are repairable, so there is a solution for those. Going forward, we are starting to look at new films. Phase-shift masks for EUV are coming into play. The concept for phase-shift masks in EUV is the same as optical. Except again, it’s still reflective as opposed to transmissive. Phase-shift masks for EUV are in the infancy stages of being developed. They are being looked at by a number of different customers that are pushing the limits on today’s litho systems. Instead of pushing EUV double patterning right away, the more cost-effective solution is using an RET. So we have a lot of learning with RETs with optical. All of those strategies are being re-deployed now for EUV. And phase-shift masks for EUV is the one next in line.

Hayashi: EUV masks are reflective. So we need a certain type of inspection system. The optical-based mask inspection systems are already in existence with a reflective mode. So we can inspect EUV masks. But quality assurance is needed for EUV masks. So the resolution and capability of the current inspection systems is one of the issues here. In addition, electron-beam mask inspection systems are coming into play with higher resolution. And theoretically, the best case for EUV mask inspection is actinic inspection. That uses an EUV light source for inspection of phase defects. That system is also in the field. All of those new systems are being used for mask inspection. In addition, we need a tool like a metrology system to measure things like reflectance of EUV light on the mask. We also need printability simulation. We call this AIMS. Today, AIMS for EUV is used to guarantee the printability of the EUV mask. Still in the metrology/inspection area, there are some challenges here to cover all those aspects with a reasonable cost.

Buck: It also adds complexity to the data processing area. EUV has some long-range effects that are not seen in optical lithography. It also has some orientation and compositional effects. It’s likely and often the case where OPC has to be done in a full-mask layout. So you can no longer assume that you can have multi-die layouts, where you have done OPC on one instance and then just place it across the mask. That translates into higher cost for OPC, and higher cost and complexity for mask process correction or MPC. You can no longer rely on a single die that is repeated in your whole mask. It has to be replicated in the data, and so your data volume goes up as well.

Fujimura: Right now, the world is thinking about going from today’s 0.33 numerical aperture EUV to high-NA EUV. But it’s going to take a while before we get there. In the meantime, how do you improve the resolution down to 5nm now, and 3nm next and 2nm eventually? How do we do that without high-NA? We do it by applying a combination of the known RET techniques that the industry already knows how to make work for 193i, including changing what shapes are on the mask. That’s how you get to OPC, sub-resolution assist features or even curvilinear ILT. Different technologies have different tradeoffs between complexity in processing, data processing, complexity in mask making, and complexity in mask inspection and repair.

Fig. 2: Cross-section of an EUV mask. Source: Luong, V., Philipsen, V., Hendrickx, E., Opsomer, K., Detavernier, C., Laubis, C., Scholze, F., Heyns, M., “Ni-Al alloys as alternative EUV mask absorber,” Appl. Sci. (8), 521 (2018). (Imec, KU Leuven, Ghent University, PTB)

Fig. 2: Cross-section of an EUV mask. Source: Luong, V., Philipsen, V., Hendrickx, E., Opsomer, K., Detavernier, C., Laubis, C., Scholze, F., Heyns, M., “Ni-Al alloys as alternative EUV mask absorber,” Appl. Sci. (8), 521 (2018). (Imec, KU Leuven, Ghent University, PTB)

SE: In the mask-making process flow, a mask blank vendor makes a mask blank. Then, the blank is shipped to a photomask vendor where the mask is made. To pattern the features on a traditional optical-based photomask, mask makers use single-beam e-beam tools based on variable shaped beam (VSB) technology. For EUV masks, though, the industry has developed multi-beam mask writers. Why do we need multi-beam mask writers for EUV masks?

Fujimura: Going to multi-beam mask writing technology fundamentally changed the way masks are manufactured for the first time in some 20-plus years. Multi-beam mask writing is a shift in new technology from existing variable shape beam mask writing technology. Multi-beam writers are better for EUV mask writing. At the same time, multi-beam mask writing enabled curvilinear ILT or curvilinear shapes to be manufactured on a mask without a write time penalty. VSB writers have write times that are proportional to the number of shots, making it slow to write complex shapes. In multi-beam writers, the write time is constant regardless of the shape. Since EUV masks are written with multi-beam writers anyway, they could have curvilinear shapes, but they aren’t today in general. EUV masks require higher precision and require a slower resist. Therefore, it takes a lot more energy to be able to expose the resist and that creates heating problems. So you want to be able to use multi-beam even if they are simple shapes. EUV masks are better to be written with multi-beam.

SE: What’s your biggest concern from your vantage point for the photomask business or any other subject?

Fujimura: There are many concerns and worries with any new node, and with adoption of new technologies like EUV and curvilinear masks. But overall, I am fully confident that all the potential issues will be worked around or resolved through innovation and teamwork by this community of people and companies.

Hayashi: Recently, semiconductors have become a focal point globally. I’m concerned about whether we are thinking about the whole ecosystem. Most are concentrating on fabs. But the merchant mask makers face some barriers or may become a so-called choke point for enabling semiconductors, especially for mature nodes. Almost no one is seeing that point, at least not yet. I’m very concerned about that.

Kasprowicz: Anything’s possible, but at what cost? And who’s willing to pay? The choke point is there, but that can be fixed with more money, tools and capacity. But look at the merchant mask manufacturers. For them to go and spend $50 million to $100 million is not easy. For a captive mask maker, it’s justified. For us as a mask blank manufacturer, there are limited suppliers out there to compete against. So it comes down to money. The money is available, but at some point there’s a business decision that comes into play. So cost is always in the equation. From a technology perspective, there’s a lot of smart people out there. There’s a lot of opportunity for innovation, as well. And we can find the answers. The question is, ‘Are people willing to pay for the answers?’ In the near term, as capacity becomes consumed, mask makers for the first time ever will be able to raise mask prices. So that will help them fund something maybe in the future, but that’s a short-lived situation. And it’s not the captive mask makers that have to worry about this. It’s the merchants.

SE: We are seeing a huge boom for chips at mature nodes. At mature nodes, chips require a photomask. But there is a shortfall for mask equipment at mature nodes, especially mask writer tools. What are the issues here?

Kasprowicz: Many of the critical tools that are in high demand are 20 years old and no longer available. When those tools were purchased, they were state-of-the-art for the mask industry and commanded appropriate ASPs. Today, they are considered very mature with low ASPs. Some replacements are starting to become available, but they will take time to get evaluated and qualified by customers. Others might be in development. Some are not being considered. The sticking point here is that mask makers, mainly merchants, have mature sites where these tools would reside. To equip these facilities with mature tools, they would take on a significant amount of expense, which has been atypical for years. Managing that expense to maintain good margins with limited ASP growth is difficult.

Buck: Cost for the mask industry has been a challenge as far back as I can remember. Another issue is regarding obsolescence and the cost of replacing older mask tools for more mature nodes. But what’s the solution there? Does the business model of merchant mask makers need to change in some way that would provide better funding for investments there? We’ve recognized the problem for a long time, but we haven’t come up with any real solutions. There have been some cost sharing efforts. In the past, we’ve seen organizations like the Advanced Mask Technology Center, where multiple IC manufacturers buy into a mask shop. Maybe there are solutions along those lines. But it does seem like it is a challenge that doesn’t necessarily have a technical solution.

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Photomask Challenges At 3nm And Beyond (Part 2 of above roundtable)
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Gearing Up For High-NA EUV
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Why Mask Blanks Are Critical
Hoya exec describes why these components are important for photomasks.

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Yield rises with mask protection; multiple sources will likely reduce costs.

Finding, Predicting EUV Stochastic Defects
Unusual effects at 5/3nm, including fewer defects with double patterning.

The Quest For Curvilinear Photomasks
Why this technology is vital for chip scaling, and what problems still need to be resolved.



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