category: Blogs – LPHP

category: Auto, Security & Edge AI

Smart Early ASIC Design Prototyping And Analysis
By Sankar Ramachandran - 04 Dec, 2014 - Comments: 0

The Power Delivery Network (PDN) is the backbone of ASIC design. It is used to supply clean power to active circuits in the IC. Voltage drop on the power rails can result in degraded performance, making delivery of noise free supply to all design elements including die, package and PCB, a challenging task. With increasing competition in the market, delivering chips on time with 'first silico... » read more

What You Don’t Know About Consumer Memory
By Loren Shalinsky - 04 Dec, 2014 - Comments: 0

I hear a lot of chatter about the memory markets and their fast growth. The question I like to pose to people is, "Which memory (DRAM) segment has grown faster over the last three years, servers or consumer?" The answer may surprise you. The correct answer, according to the latest IHS DRAM Market Tracker Database, is consumer. Since the beginning of 2012, the consumer DRAM market has grow... » read more

Power Limits Apps In The IoT
By Ann Mutschler - 04 Dec, 2014 - Comments: 0

The applications in the IoT are seemingly limitless, but the power is one thing that can’t be. Mary Ann White at Synopsys reminded me that a lot of the energy harvesting devices are super low power and there is a reason why they use just a simple LCD-type display. But we agree it would be so cool if we could have color LCDs that still only consume low power. Of course, I have no doubt tha... » read more

A (Possible) Killer Wearable App
By Bernard Murphy - 04 Dec, 2014 - Comments: 1

Wearable products (and proposals) today seem to be primarily fads or curiosities vying for the attention of a select few — the digital elite (computer-literate, with multiple devices, and data junkies). Many of us find it hard to see these apps lasting very long. I have an idea that breaks a lot of the expectations of a wearable, but may deliver higher value. I apologize in advance for credit... » read more

Memory Gating Power Optimizations
By Rob Eccles - 07 Nov, 2014 - Comments: 0

Saving power in SOCs is challenging. Often there are many memories, which collectively can consume a significant amount of power, compelling designers to make architectural choices to minimize power. These require a fair amount of study and may impact functionality and/or embedded software. Fortunately, memory gating can save power without impacting the architecture or the software. The... » read more

User Case Study
By Joseph Hupcey III - 06 Nov, 2014 - Comments: 0

Whenever more than one clock is employed in an SoC (which is all SoCs), the risk of errors from clock domain crossings (CDC) – signals (or groups of signals) that are generated in one clock domain and consumed in another – is incredibly high. Unfortunately, CDC bugs are nearly impossible to catch with conventional simulations. Thus, all too often they escape into silicon. Debugging them in ... » read more

Power Exploration: MLB World Series, Bumgarner, And Box Scores
By Mark Baker - 06 Nov, 2014 - Comments: 0

The San Francisco Giants are fresh off their third Major League Baseball (MLB) World Series win in the last 5 years. That's notable in itself, but then consider Madison Bumgarner, the starting pitcher for the Giants who was named the 2014 World Series MVP. Bumgarner finished this year’s series with a 2-0 record, one five-inning save (game seven) and 0.43 ERA in three appearances, highlighting... » read more

The Multicore Processing Conundrum
By Brian Fuller - 06 Nov, 2014 - Comments: 0

We drive relentlessly into our technological future and often it seems like we’re upgrading our high-performance vehicle as it speeds forward. That’s no easy task, to be sure. We were roaring along fine, observing Moore’s Law, and then we hit a speed bump. So design teams quickly adopted multi-core designs to compensate for the fact that pushing up speeds on single-core CPUs was a melt... » read more

Design For Always-On
By Ann Mutschler - 06 Nov, 2014 - Comments: 0

Designing for low power is such an interesting area because, while it might be frustrating, one size — or approach, in this case — does not fit all. It is a balancing act to weigh the design objectives against what is possible in the process. NXP, which launched a series of low power MCUs today aimed at the sensor-processing market, has been focusing on optimizing power consumption f... » read more

Efficient Software Development
By Christopher Seidl - 06 Nov, 2014 - Comments: 0

In the past few years, the cost of developing software for embedded systems has exploded. Previously, hardware was the biggest chunk of that cost. These days software stresses the engineering budget. Why is that? For the past 20 years or so, of the many thoroughly standardized hardware interfaces, some have been integrated into the silicon of the micro controller thereby reducing the bill of... » read more

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