Slow and Steady Wins The (Low-Power) Race


By Bhanu Kapoor Power is a key reason behind the shift in processor design to leverage multi-core architectures because it promises increase in performance without a proportional increase in energy consumption. For an application developer, today’s processors—microprocessors, as well as embedded system processors such as cell phone application processors and wireless sensor network n... » read more

It’s All About Power


In my last entry regarding IBM’s claim for new x86 technology for the datacenter, I mentioned I was trying to get an answer from IBM regarding details on the “silicon innovation” it used. That quest is ongoing, and I hope to find some actual technology, and not just marketing mumbo-jumbo at the heart of it. Keep checking back, I will give my report here. Just a few weeks after Big Blue... » read more

New x86 Technology For The Datacenter?


I wasn’t too surprised when IBM announced new servers early this month that they claim “break constraints of 30-year technology design,” since Big Blue is constantly releasing new products that they say are groundbreaking in one way or another. Reading deeper into the news, IBM is using new semiconductor technology at the heart of its new eX5 servers that it said took its engineering t... » read more

Facing Up To Reality


Welcome to the world of power awareness. Engineers are well aware that just as timing and area were previously separate considerations in the chip design process, power is also now a top-level consideration. In this blog, we will examine issues related not only to low-power in chip design, but the wide-reaching topic of power-aware design overall. Engineers today must consider the impacts of... » read more

The Formal Approach


By Bhanu Kapoor Power domains are required in the design due to stringent active and standby power specifications. Depending upon various modes of operation of a chip, power domains allow parts of a chip to be powered on/off independently from the rest of the chip. This has become common in all handheld and portable applications where stringent power requirements are a major competitive concer... » read more

Choosing A Power Delivery Network For SoCs


By Bhanu Kapoor The design and selection of an SoC power delivery network (PDN) presents unique challenges, and its design is critical to achieving power consumption goals of the design. This is true when your PDN is external and based on off-the-shelf components as well as when it is being designed on-chip as part of the SoC. This article explores the external situation. Power archit... » read more

Is Power-Aware Simulation A Must-Have?


By Bhanu Kapoor Is power-aware simulation-based verification necessary? This question has been frequently asked by the designers and becomes even more important in the context of potentially increased costs for simulation, with or without the recessionary environment. Those contending that it is not a must-have point to: --Power-managed designs were being done even when ... » read more

Things To Watch Out For


By Bhanu Kapoor A decoupling capacitor (DeCap) is used in power-managed designs to decouple a power domain from the effects of power switching in a related domain. A switching sub-circuit (a power domain or a voltage island) can mess up the power supply line upon which other sub-circuits or domains depend upon. When a load switches into a circuit, the circuit tries to increase its curre... » read more

Strategies For Power Management Verification


By Bhanu Kapoor In an earlier blog article, we took a look at some of the top power management verification issues. Typical power management verification strategy requires a combination of structural rule-checking, power-aware simulation, and formal validation to address these issues. In the previous blog article, we discussed the need for power-aware simulation and stressed the fact that... » read more

Dynamic Simulation In Power Management Verification


In the previous blog article, we took a look at some of the main power management verification issues encountered in low-power designs. Typical power management verification strategy requires a combination of structural rule-checking, power-aware simulation, and formal validation to address these issues. One question that comes up very frequently is that of how much more simulation is neede... » read more

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