5 Observations From Intel’s Event


Not long ago, Intel hosted its “Architecture Day,” where top executives from the chip giant revealed the company’s latest products and next-generation technologies. The company also discussed its strategy. To be sure, it’s a critical time for Intel. In June, Brian Krzanich was forced out as chief executive and the company is still looking for a permanent CEO. Plus, Intel has delayed it... » read more

What’s A Mott FET?


The unique physics of two-dimensional semiconductors offers the potential for new kinds of switches that could extend the usefulness of conventional MOSFETs into a variety of new areas. A MOSFET applies a voltage to one side of the gate capacitor. The resulting electric field in the channel shifts the band structure and facilitates or impedes the flow of carriers. So as devices shrink, the g... » read more

What’s Changing In Memory


As emerging big data and artificial intelligence (AI) applications, including machine learning, drive innovations across many industries, the issue of how to advance memory technologies to meet evolving computing requirements presents several challenges for the industry. The mainstream memory technologies, DRAM and NAND flash, have long been reliable industry workhorses, each optimized for s... » read more

Mixed Outlook For Fab Equipment


As 2018 dawned, the semiconductor industry appeared to be poised for a rare fourth consecutive year of equipment investment growth. That rosy outlook is about to change as clouds gather in what until now has been the sunny sky. The latest edition of the World Fab Forecast Report, published by SEMI in December 2018, reveals a downward revision of total fab equipment spending growth for 2018 ... » read more

Achieve High Hotspot Detection Accuracy by Pattern Scoring


In this paper, we combined the hotspot pattern library and the rule-based scoring system into a modularized hotspot-checking rule deck running on an automatic flow. Several DFM (design for manufacture) properties criteria will be defined to build a “score board” for hotspot candidates. When hotspots in the input design are highlighted, the scoring system can identify whether a hotspot is a ... » read more

Week In Review: Manufacturing, Test


Intel Mark Bohr, a senior fellow and director of process architecture and integration at Intel, is retiring, according to the company. Bohr, who will retire at the end of February 2019, held various technology positions during his 41-year career at Intel. Here is a quick bio on Bohr. Others have also recently retired from Intel’s manufacturing unit amid a massive reorganization in the depart... » read more

Correlation Study of Actual Temperature Profile and In-line Metrology Measurements for Within-Wafer Uniformity Improvement and Wafer Edge Yield Enhancement


Authors: Fang Fang (a), Alok Vaid (a), Alina Vinslava (a), Richard Casselberry (a), Shailendra Mishra (a), Dhairya Dixit (a), Padraig Timoney (a), Dinh Chu (b), Candice Porter (b), Da Song (b), Zhou Ren (b) Key: (a) GLOBALFOUNDRIES, 400 Stone Break Extension, Malta, NY 12020; (b) KLA-Tencor Corporation, One Technology Drive, Milpitas, CA 95035   ABSTRACT With advances in new techn... » read more

Tech Brief: Elements of Electroplating


Electroplating is a common manufacturing process that applies a thin layer of one metal onto another. The U.S. penny, for example, has been made of zinc with a thin, electroplated coating of copper since 1982. Jewelry and flatware are also frequently electroplated to improve visual appearance or provide wear and corrosion resistance. Today, electroplating is widely performed in the electronics ... » read more

2018 eBeam Initiative Perceptions Survey Results


EUV confidence and multi-beam remains high in the 7th Annual Perceptions Survey – 2018 (July). EUV perceptions remain positive. 82% of respondents predict EUV in HVM by end of 2021. Only 1% predict EUV will never happen. Confidence is high again for EUV lithography in high-volume manufacturing and expectations continue to grow around actinic mask inspection for EUV. Perceptions on the nee... » read more

N7 FinFET Self-Aligned Quadruple Patterning Modeling


Authors: Sylvain Baudot, Sofiane Guissi, Alexey P. Milenin, Joseph Ervin, Tom Schram (IMEC and COVENTOR) In this paper, we model fin pitch walk based on a process flow simulation using the Coventor SEMulator3D virtual platform. A taper angle of the fin core is introduced into the model to provide good agreement with silicon data. The impact on various Self-Aligned Quadruple Patterning proces... » read more

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