Sidestepping Moore’s Law


Calvin Cheung, vice president of engineering at ASE, sat down with Semiconductor Engineering to talk about advanced packaging, the challenges involved with the technology, and the implications for Moore’s Law. What follows are excerpts of that conversation. SE: What are some of the big issues with IC packaging today? Cheung: Moore’s Law is slowing down, but transistor scaling will co... » read more

SEMI Calls For U.S.-China Tariff Removals


In testimony today before a U.S. government interagency panel considering tariffs on $300 billion worth of Chinese goods, SEMI called for the removal of about 30 tariff lines, which cover items central to the semiconductor manufacturing process. Mike Russo, vice president of global industry advocacy at SEMI, explained in his testimony that while SEMI strongly supports efforts to better... » read more

New Advancements in Using Statistical Models as Part of a Standard MEMS Design Flow


This paper presents the benefits of using statistical models during MEMS design, through the virtual reproduction of a test structure for measuring a beam’s pull-in voltage. This electrical measurement is used as a functional indicator of the process quality for manufactured wafers. Statistical variations of process parameters (material properties, silicon thickness, sidewall angle and edge s... » read more

Unlocking Accurate Chemical Sensing on the Go


Air pollution is one of the grand challenges facing the entire planet — from the wealthiest nations to the least developed. The World Health Organization reports that nine out of 10 people breathe air containing high levels of pollutants, and that polluted air takes over seven million lives annually through stroke, heart disease and respiratory ailments. As a result, the world is thirsty... » read more

Weighing Wafers Simplifies Metrology


Building semiconductors is an incredibly exacting process, with critical dimensions posing significant equipment challenges—and with the possibility that small process excursions can cause the yield to decrease. For this reason, it has always been important to measure and monitor the most critical process steps to ensure that no further processing is done on a faulty lot and so that equipment... » read more

Power, Reliability And Security In Packaging


Semiconductor Engineering sat down to discuss advanced packaging with Ajay Lalwani, vice president of global manufacturing operations at eSilicon; Vic Kulkarni, vice president and chief strategist in the office of the CTO at ANSYS; Calvin Cheung, vice president of engineering at ASE; Walter Ng, vice president of business management at UMC; and Tien Shiah, senior manager for memory at Samsun... » read more

Improvement Of Dopant Concentration Control With Acoustic Control System For B-SiGe Epitaxy Deposition


Currently, SiGe-B epitaxy is a leading technology to induce strain in PMOS channel and improve the hole mobility to achieve better device performance. In practice, we observe that the device performance strongly depends on the dopant concentration, especially boron concentration. It is shown that the Acoustic Control System [ACS] is able to actively respond to instantaneous variations of incomi... » read more

Semiconductor Industry Association Factbook, 2019


You may already know that semiconductors make possible the global trillion dollar electronics industry. But did you know that worldwide sales have increased at a compound annual rate of almost 7 percent per year since 1998? To find out more—including why it is critical for policymakers to enact measures that boost growth and promote innovation—download the 2019 SIA Factbook. The 2019 ... » read more

DC Bus Switching Performance as Determined by Commutation Loop Parasitics and Switching Dynamics


In this article a 250 kW all-SiC inverter evaluation kit designed around low-inductance, high-speed power modules is used to demonstrate the DC bus switching performance resulting from the interaction among commutation loop parasitics and the switching dynamics. The interplay among the DC bus structure parasitics and near-RF switching dynamics can be quantified in both the time and frequency do... » read more

Manufacturing Bits: June 18


Making microvias in packages At the recent IEEE Electronic Components and Technology Conference (ECTC) in Las Vegas, Georgia Institute of Technology, Tokyo Ohka Kogyo (TOK) and Panasonic presented a paper on a technology that enables ultra-small microvias for advanced IC packages. Researchers demonstrated a picosecond UV laser technology as well as materials, which enabled 2μm to 7μm vias... » read more

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