category: Top Stories

category: Auto, Security & Edge AI

10 Must Knows About Virtual Prototypes
By Brian Bailey - 27 Feb, 2014 - Comments: 1

1. What is a virtual prototype? If you ask a room full of people to define ‘system’, you will get as many answers as there are people in the room. The same is true for virtual prototypes. A virtual prototype defines a model of something that is usually created by one group and used by another with some implied abstraction. It is a prototype that exists as a software model on which analysis... » read more

Abstractions: The Good, Bad And Ugly
By Ed Sperling - 27 Feb, 2014 - Comments: 0

Raising the level of abstraction has become almost a mantra among chipmakers and tools developers. By moving the vantage point up a couple rungs on the ladder, it’s easier to see how the individual parts of a design go together, to identify problems in the design as well as fixes to problems, and it all can happen much more quickly. That’s the theory, at least. And in most cases, it’s ... » read more

EDA Hungers For Growth
By Brian Bailey - 27 Feb, 2014 - Comments: 1

Look at the top line numbers provided by the EDA industry consortium (EDAC) and it appears as if the industry is doing well. In 2010, revenue was $5.285 billion. That number increased to $6.218 billion in 2011, and again to $6.529 billion in 2012, a 9.5% annual growth rate that would satisfy most investors. But the numbers do not tell the whole story. There is an interesting divide growing betw... » read more

Is Verification At A Crossroads?
By Ann Mutschler - 27 Feb, 2014 - Comments: 1

As SoC verification methodologies and technologies have continued to mature, it’s an interesting time for engineering teams as they look to meet time to market goals and cut costs in an environment of cutthroat profit margins. Whether it is hardware emulation, FPGA prototyping, virtual prototyping or traditional software simulation, each platform has its strengths and drawbacks, with overl... » read more

Cadence To Buy Forte
By The SE Staff - 05 Feb, 2014 - Comments: 2

Cadence agreed to buy Forte Design Systems for an undisclosed sum, enhancing its footprint in the high-level synthesis market as higher levels of abstraction gain traction across the SoC world. For the better part of a decade high-level synthesis (HLS) has been a market opportunity that was just around the next bend, along with electronic system-level design and SystemC modeling. Mentor Grap... » read more

The Uncertain Future Of Fabless Semis
By Ann Mutschler - 30 Jan, 2014 - Comments: 1

As with most things, perspective is everything, this is especially true when it comes to changes in the semiconductor ecosystem. Some industry watchers say indicators clearly point to a shift happening where system OEMs again make the decisions about what is in a chip, both software and hardware, pointing to Apple, Samsung, Microsoft and Intel as prime examples. As a result, the fabless semicon... » read more

Patents Under Scrutiny
By Brian Bailey - 30 Jan, 2014 - Comments: 2

After years of complaints by high-tech companies that the U.S. patent system is misused, too slow or completely outdated, patent attorneys are about to get their day in court. The U.S. Supreme Court has agreed to review an appeal between Alice Corp., an electronic marketplace for trading IP, and CLS Bank International, involving what kinds of inventions can be patented, according to the Supr... » read more

The Growing Verification Challenge
By Ed Sperling - 30 Jan, 2014 - Comments: 1

As complexity continues to mount in designing SoCs, so does the challenge of verifying them within the same time window and using the same compute and engineering resources. Chipmakers aren’t always successful at this. In many cases they have to put more engineers on the verification and debug at the tail end of a design to get it out the door on or close to schedule. In many cases that al... » read more

The Road Ahead For 2014: Tools
By Brian Bailey - 30 Jan, 2014 - Comments: 0

In the third and final part of this predictions series we see the natural conclusion of market shifts that are driving changes in semiconductors, and which in turn drive the tools and IP needed to create those systems. To be expected, the changes fall into a few areas: New tools, techniques and changes required for smaller geometries; A migration to higher-levels of abstraction and the... » read more

How To Speed Up Verification
By Ann Mutschler - 30 Jan, 2014 - Comments: 0

Software requirements have changed the tapeout process in today’s SoCs so much that it isn’t uncommon to hear a design can’t be released because Android hasn’t booted. “It’s one of those things where you really understand that what used to be classic hardware verification that said ‘the chip is done’ is heavily impacted by if it actually does software things,” noted Frank S... » read more

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