Advanced Packaging Moves To Cars


By Ann Steffora Mutschler and Ed Sperling As automotive OEMs come up to speed on electrification of vehicles, each at their own pace, they are starting to embrace novel packaging approaches as a way to differentiate themselves in an increasingly competitive market. Wirebond used to dominate this market, where most of the chips were relatively unsophisticated and product cycles were slow�... » read more

Module Testing Adds New Challenges


System-in-package (SiP) and other advanced packaging technologies are putting more components together in tighter spaces than previously seen. Often these packages are contained in a module, which is something more than a chip package and a great deal smaller than most printed circuit boards. Testing these modules often requires system-level test. These modules typically will be inserted int... » read more

Rethinking SSDs In Data Centers


Semiconductors that control how data gets on and off solid-state drives (SSDs) inside of data centers are having a moment in the sun. This surge in interest involves much more than just the SSD device. It leverages an entire ecosystem, starting with system architects and design engineers, who must figure out the best paths for data flow on- and off-chip and through a system. It also includes... » read more

Flexible Devices Drive New IoT Apps


Printed and flexible electronics are becoming almost synonymous with many emerging applications in the IoT, and as the technologies progress so do the markets that rely on those technologies. Flexible [getkc id="187" kc_name="sensors"] factor into a number of [getkc id="76" kc_name="IoT"] use cases such as agriculture, health care, and structural health monitoring. Other types of flexible de... » read more

IP Business Changing As Markets Shift


Semiconductor Engineering sat down to discuss IP protection, tracking and reuse with Srinath Anantharaman, CEO of [getentity id="22203" e_name="ClioSoft"]; and Jeff Galloway, CTO of Silicon Creations; Marc Greenberg, group director of product marketing for [getentity id="22032" e_name="Cadence"]'s IP Group; and John Koeter, vice president of marketing for [getentity id="22035" e_name="Synopsys"... » read more

Using Machine Learning In EDA


Machine learning is beginning to have an impact on the EDA tools business, cutting the cost of designs by allowing tools to suggest solutions to common problems that would take design teams weeks or even months to work through. This reduces the cost of designs. It also potentially expands the market for EDA tools, opening the door to even new design starts and more chips from more compan... » read more

CCIX Enables Machine Learning


It takes a lot of technology to enable something like machine learning, and not all of it is as glamorous as neural network architectures and algorithms. Several levels below that is the actual hardware on which these run, and that brings us into the even less sexy world of interfaces. One such interface, the Cache Coherent Interconnect for Accelerators (CCIX), pronounced C6, aims to make th... » read more

Designing For The IoT


Each day of the Design Automation Conference (DAC) starts with a keynote. What was particularly noteworthy this year was that they all focused on some aspect of the [getkc id="76" comment="Internet of Things"] (IoT), and the value of hardware within the IoT. Semiconductor Engineering attended all of the keynotes. What follows are highlights of those talks, along with some analysis. (The four... » read more

The Secret Life Of Accelerators


Accelerator chips increasingly are providing the performance boost that device scaling once provided, changing basic assumptions about how data moves within an electronic system and where it should be processed. To the outside world, little appears to have changed. But beneath the glossy exterior, and almost always hidden from view, accelerator chips are becoming an integral part of most des... » read more

How Much Verification Is Necessary?


Since the advent of IC design flows, starting with RTL descriptions in languages like Verilog or VHDL, project teams have struggled with how much verification can and should be performed by the original RTL developers. Constrained-random methods based on high-level languages such as [gettech id="31021" t_name="e"] or [gettech id="31023" comment="SystemVerilog"] further cemented the role of t... » read more

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