Pathfinding For Power And Heat


By Ed Sperling There are many ways to measure power and heat in an IC, and each one of them adds tremendous value to a design. But there are still holes, and those holes are just beginning to get filled. Power and heat have emerged as two of the most persistent problems in advanced designs, and there is no single or simple way to tackle either of them. Nevertheless, there is at least progre... » read more

The Downside Of Derivatives


By Ann Steffora Mutschler From a planning perspective, creating derivative chips seems a straightforward task, but the process is much more complex than simply replacing or adding a peripheral—it starts with identifying the right team of engineers to perform that process. “One of the needs in the market is somebody to have vertical expertise to do derivative design and yet be cost-effec... » read more

3D Standards For The Real World


By Pallab Chatterjee Stacking die has progressed from what is technologically possible to what will be realistically feasible in a fabless or fab-lite world. The big challenges may be less about how to deal with stress caused by a TSV or thermal density and more about companies working together in a disaggregated supply chain. This was quite evident at a recent DesignCon panel dicussion on ... » read more

Derivative ICs: A Look At The Options


By Ann Steffora Mutschler With the cost of designing and producing even moderately advanced SoCs skyrocketing, semiconductor companies and systems houses must find ways to defray the cost across a larger number of end uses than ever. As such many companies have adopted a platform-based derivative design approach, with that the platform serving as the first SoC design of a new family. That s... » read more

Different Tradeoffs


By Ed Sperling The push to “smaller, faster and cheaper” hasn’t changed since ICs were first introduced, but the context for those requirements is beginning to shift—with enormous consequences. What was once done on multiple chips continue to migrate to a single chip or package because of cost, but in some cases the decisions about goes where go well beyond an individual device to i... » read more

Market Catches Up With Verification IP


By Ed Sperling Ever since verification IP was introduced it was seen as something that should be given away with purchased IP. The result was limited investment by IP vendors, frustration on the part of IP customers, and a market opportunity that nearly fizzled before it even began. But as the amount of commercially developed IP content continues to grow in ICs, the potential interactions ... » read more

Different Tradeoffs


By Ed Sperling The push to “smaller, faster and cheaper” hasn’t changed since ICs were first introduced, but the context for those requirements is beginning to shift—with enormous consequences. What was once done on multiple chips continue to migrate to a single chip or package because of cost, but in some cases the decisions about goes where go well beyond an individual device to i... » read more

Power Forces Changes In Portable Audio Design


By Pallab Chatterjee Power is becoming an overriding issue in the analog world, and nowhere was this more apparent than at the recent NAMM show. The annual show, which is run by the National Association of Music Merchants, featured mostly iOS applications and higher-performance hardware plug-ins, although Android development is starting show up. The recent releases of Android support the ... » read more

Mechanical Meets Electrical


By Ed Sperling For the first part of the 20th century mechanical engineering dominated almost everything in technology. For the second half, once the transistor and the integrated circuit became well entrenched, those two disciplines largely divided up the tech market. More recently, however, they are being forced to collaborate in teams that historically had nothing in common. While the co... » read more

Margin Of Error


By Ed Sperling Adding extra circuits and silicon area to a chip has always been frowned upon by chipmakers. Extra silicon means extra money, and for most chips the least expensive is always the better choice. But at advanced process nodes, margin also can slow performance, increase power consumption, and make it harder to achieve timing closure. The obvious solution is to reduce margin thro... » read more

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